Lines Matching refs:aux

238 	struct drm_dp_aux aux;  member
368 static ssize_t dw_dp_aux_transfer(struct drm_dp_aux *aux, in dw_dp_aux_transfer() argument
374 struct dw_dp *dp = dev_get_priv(aux->dev); in dw_dp_aux_transfer()
542 ret = drm_dp_dpcd_readb(&dp->aux, DP_SET_POWER, &value); in dw_dp_link_power_up()
549 ret = drm_dp_dpcd_writeb(&dp->aux, DP_SET_POWER, value); in dw_dp_link_power_up()
563 drm_dp_dpcd_writeb(&dp->aux, DP_MSTM_CTRL, 0); in dw_dp_link_probe()
564 ret = drm_dp_read_dpcd_caps(&dp->aux, link->dpcd); in dw_dp_link_probe()
568 ret = drm_dp_dpcd_readb(&dp->aux, DP_DPRX_FEATURE_ENUMERATION_LIST, in dw_dp_link_probe()
620 ret = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, buf, lanes); in dw_dp_link_train_update_vs_emph()
687 ret = drm_dp_dpcd_write(&dp->aux, DP_LINK_BW_SET, buf, sizeof(buf)); in dw_dp_link_configure()
694 ret = drm_dp_dpcd_write(&dp->aux, DP_DOWNSPREAD_CTRL, buf, in dw_dp_link_configure()
755 ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, in dw_dp_link_train_set_pattern()
813 ret = drm_dp_dpcd_read_link_status(&dp->aux, status); in dw_dp_link_clock_recovery()
866 ret = drm_dp_dpcd_read_link_status(&dp->aux, status); in dw_dp_link_channel_equalization()
1467 conn_state->edid = drm_do_get_edid(&dp->aux.ddc); in dw_dp_connector_get_edid()
1654 conn_state->edid = drm_do_get_edid(&dp->aux.ddc); in dw_dp_connector_get_timing()
1728 dp->aux.name = "dw-dp"; in dw_dp_ddc_init()
1729 dp->aux.dev = dp->dev; in dw_dp_ddc_init()
1730 dp->aux.transfer = dw_dp_aux_transfer; in dw_dp_ddc_init()
1731 dp->aux.ddc.ddc_xfer = drm_dp_i2c_xfer; in dw_dp_ddc_init()