336 	size_t i, j;  in dw_dp_aux_write_data()  local
338 	for (i = 0; i < DIV_ROUND_UP(size, 4); i++) {  in dw_dp_aux_write_data()
339 		size_t num = min_t(size_t, size - i * 4, 4);  in dw_dp_aux_write_data()
343 			value |= buffer[i * 4 + j] << (j * 8);  in dw_dp_aux_write_data()
345 		regmap_write(dp->regmap, DPTX_AUX_DATA0 + i * 4, value);  in dw_dp_aux_write_data()
353 	size_t i, j;  in dw_dp_aux_read_data()  local
355 	for (i = 0; i < DIV_ROUND_UP(size, 4); i++) {  in dw_dp_aux_read_data()
356 		size_t num = min_t(size_t, size - i * 4, 4);  in dw_dp_aux_read_data()
359 		regmap_read(dp->regmap, DPTX_AUX_DATA0 + i * 4, &value);  in dw_dp_aux_read_data()
362 			buffer[i * 4 + j] = value >> (j * 8);  in dw_dp_aux_read_data()
599 	int i, ret;  in dw_dp_link_train_update_vs_emph()  local
604 	for (i = 0; i < lanes; i++) {  in dw_dp_link_train_update_vs_emph()
605 		phy_cfg.dp.voltage[i] = vs[i];  in dw_dp_link_train_update_vs_emph()
606 		phy_cfg.dp.pre[i] = pe[i];  in dw_dp_link_train_update_vs_emph()
617 	for (i = 0; i < lanes; i++)  in dw_dp_link_train_update_vs_emph()
618 		buf[i] = (vs[i] << DP_TRAIN_VOLTAGE_SWING_SHIFT) |  in dw_dp_link_train_update_vs_emph()
619 			 (pe[i] << DP_TRAIN_PRE_EMPHASIS_SHIFT);  in dw_dp_link_train_update_vs_emph()
706 	unsigned int i;  in dw_dp_link_train_init()  local
708 	for (i = 0; i < 4; i++) {  in dw_dp_link_train_init()
709 		request->voltage_swing[i] = 0;  in dw_dp_link_train_init()
710 		adjust->voltage_swing[i] = 0;  in dw_dp_link_train_init()
712 		request->pre_emphasis[i] = 0;  in dw_dp_link_train_init()
713 		adjust->pre_emphasis[i] = 0;  in dw_dp_link_train_init()
767 	unsigned int i;  in dw_dp_link_get_adjustments()  local
769 	for (i = 0; i < link->lanes; i++) {  in dw_dp_link_get_adjustments()
770 		adjust->voltage_swing[i] =  in dw_dp_link_get_adjustments()
771 			drm_dp_get_adjust_request_voltage(status, i) >>  in dw_dp_link_get_adjustments()
774 		adjust->pre_emphasis[i] =  in dw_dp_link_get_adjustments()
775 			drm_dp_get_adjust_request_pre_emphasis(status, i) >>  in dw_dp_link_get_adjustments()
784 	unsigned int i;  in dw_dp_link_train_adjust()  local
786 	for (i = 0; i < 4; i++)  in dw_dp_link_train_adjust()
787 		if (request->voltage_swing[i] != adjust->voltage_swing[i])  in dw_dp_link_train_adjust()
788 			request->voltage_swing[i] = adjust->voltage_swing[i];  in dw_dp_link_train_adjust()
790 	for (i = 0; i < 4; i++)  in dw_dp_link_train_adjust()
791 		if (request->pre_emphasis[i] != adjust->pre_emphasis[i])  in dw_dp_link_train_adjust()
792 			request->pre_emphasis[i] = adjust->pre_emphasis[i];  in dw_dp_link_train_adjust()
995 	int ret, i, phy_rate;  in dw_dp_set_phy_default_config()  local
1009 	for (i = 0; i < link->lanes; i++) {  in dw_dp_set_phy_default_config()
1010 		phy_cfg.dp.voltage[i] = 3;  in dw_dp_set_phy_default_config()
1011 		phy_cfg.dp.pre[i] = 0;  in dw_dp_set_phy_default_config()
1061 	int i, nr = 0;  in dw_dp_send_sdp()  local
1069 	for (i = 1; i < 9; i++, payload += 4)  in dw_dp_send_sdp()
1070 		regmap_write(dp->regmap, reg + i * 4,  in dw_dp_send_sdp()
1476 	int i;  in dw_dp_get_output_fmts_index()  local
1478 	for (i = 0; i < ARRAY_SIZE(possible_output_fmts); i++) {  in dw_dp_get_output_fmts_index()
1479 		const struct dw_dp_output_format *fmt = &possible_output_fmts[i];  in dw_dp_get_output_fmts_index()
1485 	if (i == ARRAY_SIZE(possible_output_fmts))  in dw_dp_get_output_fmts_index()
1488 	return i;  in dw_dp_get_output_fmts_index()
1578 	int i;  in dw_dp_mode_valid()  local
1590 	for (i = 0; i < edid_data->modes; i++) {  in dw_dp_mode_valid()
1591 		if (!dw_dp_bandwidth_ok(dp, &edid_data->mode_buf[i], min_bpp, link->lanes,  in dw_dp_mode_valid()
1593 			edid_data->mode_buf[i].invalid = true;  in dw_dp_mode_valid()
1602 	unsigned int i;  in dw_dp_get_output_bus_fmts()  local
1604 	for (i = 0; i < ARRAY_SIZE(possible_output_fmts); i++) {  in dw_dp_get_output_bus_fmts()
1605 		const struct dw_dp_output_format *fmt = &possible_output_fmts[i];  in dw_dp_get_output_bus_fmts()
1628 	if (i == ARRAY_SIZE(possible_output_fmts))  in dw_dp_get_output_bus_fmts()
1631 	return i;  in dw_dp_get_output_bus_fmts()
1636 	int ret = 0, i;  in dw_dp_connector_get_timing()  local
1681 		for (i = 0; i < edid_data.modes; i++)  in dw_dp_connector_get_timing()
1682 			edid_data.mode_buf[i].vrefresh =  in dw_dp_connector_get_timing()
1683 				drm_mode_vrefresh(&edid_data.mode_buf[i]);  in dw_dp_connector_get_timing()