Lines Matching refs:musb
83 static void musb_ep_program(struct musb *musb, u8 epnum,
92 struct musb *musb = ep->musb; in musb_h_tx_flush_fifo() local
101 dev_dbg(musb->controller, "Host TX FIFONOTEMPTY csr: %02x\n", csr); in musb_h_tx_flush_fifo()
189 musb_start_urb(struct musb *musb, int is_in, struct musb_qh *qh) in musb_start_urb() argument
193 void __iomem *mbase = musb->mregs; in musb_start_urb()
211 musb->ep0_stage = MUSB_EP0_START; in musb_start_urb()
229 dev_dbg(musb->controller, "qh %p urb %p dev%d ep%d%s%s, hw_ep %d, %p/%d\n", in musb_start_urb()
244 musb_ep_program(musb, epnum, urb, !is_in, buf, offset, len); in musb_start_urb()
256 dev_dbg(musb->controller, "check whether there's still time for periodic Tx\n"); in musb_start_urb()
273 dev_dbg(musb->controller, "SOF for %d\n", epnum); in musb_start_urb()
283 dev_dbg(musb->controller, "Start TX%d %s\n", epnum, in musb_start_urb()
294 static void musb_giveback(struct musb *musb, struct urb *urb, int status) in musb_giveback() argument
295 __releases(musb->lock) in musb_giveback()
296 __acquires(musb->lock) in musb_giveback()
298 dev_dbg(musb->controller, in musb_giveback()
307 usb_hcd_unlink_urb_from_ep(musb_to_hcd(musb), urb); in musb_giveback()
308 spin_unlock(&musb->lock); in musb_giveback()
309 usb_hcd_giveback_urb(musb_to_hcd(musb), urb, status); in musb_giveback()
310 spin_lock(&musb->lock); in musb_giveback()
340 static void musb_advance_schedule(struct musb *musb, struct urb *urb, in musb_advance_schedule() argument
365 musb_giveback(musb, urb, status); in musb_advance_schedule()
373 struct dma_controller *dma = musb->dma_controller; in musb_advance_schedule()
421 dev_dbg(musb->controller, "... next ep%d %cX urb %p\n", in musb_advance_schedule()
423 musb_start_urb(musb, is_in, qh); in musb_advance_schedule()
450 musb_host_packet_rx(struct musb *musb, struct urb *urb, u8 epnum, u8 iso_err) in musb_host_packet_rx() argument
458 struct musb_hw_ep *hw_ep = musb->endpoints + epnum; in musb_host_packet_rx()
466 dev_dbg(musb->controller, "RX%d count %d, buffer %p len %d/%d\n", epnum, rx_count, in musb_host_packet_rx()
489 dev_dbg(musb->controller, "** OVERFLOW %d into %d\n", rx_count, length); in musb_host_packet_rx()
508 dev_dbg(musb->controller, "** OVERFLOW %d into %d\n", rx_count, length); in musb_host_packet_rx()
555 musb_rx_reinit(struct musb *musb, struct musb_qh *qh, struct musb_hw_ep *ep) in musb_rx_reinit() argument
593 if (musb->is_multipoint) { in musb_rx_reinit()
599 musb_writeb(musb->mregs, MUSB_FADDR, qh->addr_reg); in musb_rx_reinit()
608 if (musb->double_buffer_not_ok) in musb_rx_reinit()
683 static void musb_ep_program(struct musb *musb, u8 epnum, in musb_ep_program() argument
690 void __iomem *mbase = musb->mregs; in musb_ep_program()
691 struct musb_hw_ep *hw_ep = musb->endpoints + epnum; in musb_ep_program()
696 dev_dbg(musb->controller, "%s hw%d urb %p spd%d dev%d ep%d%s " in musb_ep_program()
707 dma_controller = musb->dma_controller; in musb_ep_program()
772 if (musb->is_multipoint) { in musb_ep_program()
783 if (musb->double_buffer_not_ok) in musb_ep_program()
786 else if (can_bulk_split(musb, qh->type)) in musb_ep_program()
797 if (musb->is_multipoint) in musb_ep_program()
802 if (can_bulk_split(musb, qh->type)) in musb_ep_program()
826 musb_rx_reinit(musb, qh, hw_ep); in musb_ep_program()
878 dev_dbg(musb->controller, "RXCSR%d := %04x\n", epnum, csr); in musb_ep_program()
889 static bool musb_h_ep0_continue(struct musb *musb, u16 len, struct urb *urb) in musb_h_ep0_continue() argument
894 struct musb_hw_ep *hw_ep = musb->control_ep; in musb_h_ep0_continue()
898 switch (musb->ep0_stage) { in musb_h_ep0_continue()
921 dev_dbg(musb->controller, "start no-DATA\n"); in musb_h_ep0_continue()
924 dev_dbg(musb->controller, "start IN-DATA\n"); in musb_h_ep0_continue()
925 musb->ep0_stage = MUSB_EP0_IN; in musb_h_ep0_continue()
929 dev_dbg(musb->controller, "start OUT-DATA\n"); in musb_h_ep0_continue()
930 musb->ep0_stage = MUSB_EP0_OUT; in musb_h_ep0_continue()
941 dev_dbg(musb->controller, "Sending %d byte%s to ep0 fifo %p\n", in musb_h_ep0_continue()
952 ERR("bogus ep0 stage %d\n", musb->ep0_stage); in musb_h_ep0_continue()
965 irqreturn_t musb_h_ep0_irq(struct musb *musb) in musb_h_ep0_irq() argument
970 void __iomem *mbase = musb->mregs; in musb_h_ep0_irq()
971 struct musb_hw_ep *hw_ep = musb->control_ep; in musb_h_ep0_irq()
986 dev_dbg(musb->controller, "<== csr0 %04x, qh %p, count %d, urb %p, stage %d\n", in musb_h_ep0_irq()
987 csr, qh, len, urb, musb->ep0_stage); in musb_h_ep0_irq()
990 if (MUSB_EP0_STATUS == musb->ep0_stage) { in musb_h_ep0_irq()
997 dev_dbg(musb->controller, "STALLING ENDPOINT\n"); in musb_h_ep0_irq()
1001 dev_dbg(musb->controller, "no response, csr0 %04x\n", csr); in musb_h_ep0_irq()
1005 dev_dbg(musb->controller, "control NAK timeout\n"); in musb_h_ep0_irq()
1020 dev_dbg(musb->controller, "aborting\n"); in musb_h_ep0_irq()
1053 if (musb_h_ep0_continue(musb, len, urb)) { in musb_h_ep0_irq()
1055 csr = (MUSB_EP0_IN == musb->ep0_stage) in musb_h_ep0_irq()
1068 musb->ep0_stage = MUSB_EP0_STATUS; in musb_h_ep0_irq()
1070 dev_dbg(musb->controller, "ep0 STATUS, csr %04x\n", csr); in musb_h_ep0_irq()
1076 musb->ep0_stage = MUSB_EP0_IDLE; in musb_h_ep0_irq()
1080 musb_advance_schedule(musb, urb, hw_ep, 1); in musb_h_ep0_irq()
1103 void musb_host_tx(struct musb *musb, u8 epnum) in musb_host_tx() argument
1110 struct musb_hw_ep *hw_ep = musb->endpoints + epnum; in musb_host_tx()
1115 void __iomem *mbase = musb->mregs; in musb_host_tx()
1124 dev_dbg(musb->controller, "extra TX%d ready, csr %04x\n", epnum, tx_csr); in musb_host_tx()
1130 dev_dbg(musb->controller, "OUT/TX%d end, csr %04x%s\n", epnum, tx_csr, in musb_host_tx()
1136 dev_dbg(musb->controller, "TX end %d stall\n", epnum); in musb_host_tx()
1143 dev_dbg(musb->controller, "TX 3strikes on ep=%d\n", epnum); in musb_host_tx()
1148 dev_dbg(musb->controller, "TX end=%d device not responding\n", epnum); in musb_host_tx()
1168 (void) musb->dma_controller->channel_abort(dma); in musb_host_tx()
1193 dev_dbg(musb->controller, "extra TX%d ready, csr %04x\n", epnum, tx_csr); in musb_host_tx()
1252 dev_dbg(musb->controller, "DMA complete but packet still in FIFO, " in musb_host_tx()
1311 musb_advance_schedule(musb, urb, hw_ep, USB_DIR_OUT); in musb_host_tx()
1314 if (musb_tx_dma_program(musb->dma_controller, hw_ep, qh, urb, in musb_host_tx()
1321 dev_dbg(musb->controller, "not complete, but DMA enabled?\n"); in musb_host_tx()
1335 usb_hcd_unmap_urb_for_dma(musb_to_hcd(musb), urb); in musb_host_tx()
1387 static void musb_bulk_rx_nak_timeout(struct musb *musb, struct musb_hw_ep *ep) in musb_bulk_rx_nak_timeout() argument
1391 void __iomem *mbase = musb->mregs; in musb_bulk_rx_nak_timeout()
1405 cur_qh = first_qh(&musb->in_bulk); in musb_bulk_rx_nak_timeout()
1410 musb->dma_controller->channel_abort(dma); in musb_bulk_rx_nak_timeout()
1417 list_move_tail(&cur_qh->ring, &musb->in_bulk); in musb_bulk_rx_nak_timeout()
1420 next_qh = first_qh(&musb->in_bulk); in musb_bulk_rx_nak_timeout()
1424 musb_start_urb(musb, 1, next_qh); in musb_bulk_rx_nak_timeout()
1432 void musb_host_rx(struct musb *musb, u8 epnum) in musb_host_rx() argument
1435 struct musb_hw_ep *hw_ep = musb->endpoints + epnum; in musb_host_rx()
1439 void __iomem *mbase = musb->mregs; in musb_host_rx()
1462 dev_dbg(musb->controller, "BOGUS RX%d ready, csr %04x, count %d\n", epnum, val, in musb_host_rx()
1470 dev_dbg(musb->controller, "<== hw %d rxcsr %04x, urb actual %d (+dma %zu)\n", in musb_host_rx()
1477 dev_dbg(musb->controller, "RX end %d STALL\n", epnum); in musb_host_rx()
1483 dev_dbg(musb->controller, "end %d RX proto error\n", epnum); in musb_host_rx()
1491 dev_dbg(musb->controller, "RX end %d NAK timeout\n", epnum); in musb_host_rx()
1503 && !list_is_singular(&musb->in_bulk)) { in musb_host_rx()
1504 musb_bulk_rx_nak_timeout(musb, hw_ep); in musb_host_rx()
1514 dev_dbg(musb->controller, "RX end %d ISO data error\n", epnum); in musb_host_rx()
1519 dev_dbg(musb->controller, "end %d high bandwidth incomplete ISO packet RX\n", in musb_host_rx()
1529 (void) musb->dma_controller->channel_abort(dma); in musb_host_rx()
1560 (void) musb->dma_controller->channel_abort(dma); in musb_host_rx()
1565 dev_dbg(musb->controller, "RXCSR%d %04x, reqpkt, len %zu%s\n", epnum, rx_csr, in musb_host_rx()
1615 dev_dbg(musb->controller, "ep %d dma %s, rxcsr %04x, rxcount %d\n", epnum, in musb_host_rx()
1648 dev_dbg(musb->controller, "RX%d count %d, buffer 0x%x len %d/%d\n", in musb_host_rx()
1655 c = musb->dma_controller; in musb_host_rx()
1672 dev_dbg(musb->controller, "** OVERFLOW %d into %d\n",\ in musb_host_rx()
1761 usb_hcd_unmap_urb_for_dma(musb_to_hcd(musb), urb); in musb_host_rx()
1762 done = musb_host_packet_rx(musb, urb, in musb_host_rx()
1764 dev_dbg(musb->controller, "read %spacket\n", done ? "last " : ""); in musb_host_rx()
1774 musb_advance_schedule(musb, urb, hw_ep, USB_DIR_IN); in musb_host_rx()
1784 struct musb *musb, in musb_schedule() argument
1799 head = &musb->control; in musb_schedule()
1800 hw_ep = musb->control_ep; in musb_schedule()
1816 for (epnum = 1, hw_ep = musb->endpoints + 1; in musb_schedule()
1817 epnum < musb->nr_endpoints; in musb_schedule()
1824 if (hw_ep == musb->bulk_ep) in musb_schedule()
1847 hw_ep = musb->endpoints + epnum; in musb_schedule()
1861 hw_ep = musb->bulk_ep; in musb_schedule()
1863 head = &musb->in_bulk; in musb_schedule()
1865 head = &musb->out_bulk; in musb_schedule()
1884 hw_ep = musb->endpoints + best_end; in musb_schedule()
1885 dev_dbg(musb->controller, "qh %p periodic slot %d\n", qh, best_end); in musb_schedule()
1895 musb_start_urb(musb, is_in, qh); in musb_schedule()
1901 static int tt_needed(struct musb *musb, struct usb_device *dev) in tt_needed() argument
1903 if ((musb_readb(musb->mregs, MUSB_POWER) & MUSB_POWER_HSMODE) && in tt_needed()
1920 struct musb *musb = hcd_to_musb(hcd); local
1929 if (!is_host_active(musb) || !musb->is_active)
1932 spin_lock_irqsave(&musb->lock, flags);
1937 spin_unlock_irqrestore(&musb->lock, flags);
1958 spin_lock_irqsave(&musb->lock, flags);
1960 spin_unlock_irqrestore(&musb->lock, flags);
1981 ok = (usb_pipein(urb->pipe) && musb->hb_iso_rx)
1982 || (usb_pipeout(urb->pipe) && musb->hb_iso_tx);
2045 if (musb->is_multipoint) {
2070 if (tt_needed(musb, urb->dev)) {
2087 spin_lock_irqsave(&musb->lock, flags);
2096 ret = musb_schedule(musb, qh,
2105 spin_unlock_irqrestore(&musb->lock, flags);
2109 spin_lock_irqsave(&musb->lock, flags);
2111 spin_unlock_irqrestore(&musb->lock, flags);
2125 struct musb *musb = ep->musb; local
2128 void __iomem *regs = ep->musb->mregs;
2140 status = ep->musb->dma_controller->channel_abort(dma);
2141 dev_dbg(musb->controller,
2176 musb_advance_schedule(ep->musb, urb, ep, is_in);
2189 struct musb *musb = hcd_to_musb(hcd); local
2195 dev_dbg(musb->controller, "urb=%p, dev%d ep%d%s\n", urb,
2200 spin_lock_irqsave(&musb->lock, flags);
2227 musb_giveback(musb, urb, 0);
2241 spin_unlock_irqrestore(&musb->lock, flags);
2252 struct musb *musb = hcd_to_musb(hcd); local
2256 spin_lock_irqsave(&musb->lock, flags);
2282 musb_advance_schedule(musb, urb, qh->hw_ep, is_in);
2290 musb_giveback(musb, next_urb(qh), -ESHUTDOWN);
2297 spin_unlock_irqrestore(&musb->lock, flags);
2302 struct musb *musb = hcd_to_musb(hcd); local
2304 return musb_readw(musb->mregs, MUSB_FRAME);
2309 struct musb *musb = hcd_to_musb(hcd); local
2315 musb->port1_status = 0;
2327 struct musb *musb = hcd_to_musb(hcd); local
2330 if (!is_host_active(musb))
2333 switch (musb->xceiv->state) {
2341 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
2343 musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
2349 if (musb->is_active) {
2351 otg_state_string(musb->xceiv->state));
2366 .hcd_priv_size = sizeof(struct musb),