Lines Matching refs:musb
115 static inline struct musb *dev_to_musb(struct device *dev) in dev_to_musb()
219 struct musb *musb = hw_ep->musb; in musb_write_fifo() local
224 dev_dbg(musb->controller, "%cX ep%d fifo %p count %d buf %p\n", in musb_write_fifo()
261 struct musb *musb = hw_ep->musb; in musb_read_fifo() local
264 dev_dbg(musb->controller, "%cX ep%d fifo %p count %d buf %p\n", in musb_read_fifo()
321 void musb_load_testpacket(struct musb *musb) in musb_load_testpacket() argument
323 void __iomem *regs = musb->endpoints[0].regs; in musb_load_testpacket()
325 musb_ep_select(musb->mregs, 0); in musb_load_testpacket()
326 musb_write_fifo(musb->control_ep, in musb_load_testpacket()
339 struct musb *musb = (struct musb *)data; in musb_otg_timer_func() local
342 spin_lock_irqsave(&musb->lock, flags); in musb_otg_timer_func()
343 switch (musb->xceiv->state) { in musb_otg_timer_func()
345 dev_dbg(musb->controller, "HNP: b_wait_acon timeout; back to b_peripheral\n"); in musb_otg_timer_func()
346 musb_g_disconnect(musb); in musb_otg_timer_func()
347 musb->xceiv->state = OTG_STATE_B_PERIPHERAL; in musb_otg_timer_func()
348 musb->is_active = 0; in musb_otg_timer_func()
352 dev_dbg(musb->controller, "HNP: %s timeout\n", in musb_otg_timer_func()
353 otg_state_string(musb->xceiv->state)); in musb_otg_timer_func()
354 musb_platform_set_vbus(musb, 0); in musb_otg_timer_func()
355 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; in musb_otg_timer_func()
358 dev_dbg(musb->controller, "HNP: Unhandled mode %s\n", in musb_otg_timer_func()
359 otg_state_string(musb->xceiv->state)); in musb_otg_timer_func()
361 musb->ignore_disconnect = 0; in musb_otg_timer_func()
362 spin_unlock_irqrestore(&musb->lock, flags); in musb_otg_timer_func()
368 void musb_hnp_stop(struct musb *musb) in musb_hnp_stop() argument
370 struct usb_hcd *hcd = musb_to_hcd(musb); in musb_hnp_stop()
371 void __iomem *mbase = musb->mregs; in musb_hnp_stop()
374 dev_dbg(musb->controller, "HNP: stop from %s\n", otg_state_string(musb->xceiv->state)); in musb_hnp_stop()
376 switch (musb->xceiv->state) { in musb_hnp_stop()
378 musb_g_disconnect(musb); in musb_hnp_stop()
379 dev_dbg(musb->controller, "HNP: back to %s\n", in musb_hnp_stop()
380 otg_state_string(musb->xceiv->state)); in musb_hnp_stop()
383 dev_dbg(musb->controller, "HNP: Disabling HR\n"); in musb_hnp_stop()
385 musb->xceiv->state = OTG_STATE_B_PERIPHERAL; in musb_hnp_stop()
386 MUSB_DEV_MODE(musb); in musb_hnp_stop()
393 dev_dbg(musb->controller, "HNP: Stopping in unknown state %s\n", in musb_hnp_stop()
394 otg_state_string(musb->xceiv->state)); in musb_hnp_stop()
402 musb->port1_status &= ~(USB_PORT_STAT_C_CONNECTION << 16); in musb_hnp_stop()
418 static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb, in musb_stage0_irq() argument
422 struct usb_otg *otg = musb->xceiv->otg; in musb_stage0_irq()
426 dev_dbg(musb->controller, "<== Power=%02x, DevCtl=%02x, int_usb=0x%x\n", power, devctl, in musb_stage0_irq()
436 dev_dbg(musb->controller, "RESUME (%s)\n", otg_state_string(musb->xceiv->state)); in musb_stage0_irq()
439 void __iomem *mbase = musb->mregs; in musb_stage0_irq()
441 switch (musb->xceiv->state) { in musb_stage0_irq()
449 musb->int_usb &= ~MUSB_INTR_SUSPEND; in musb_stage0_irq()
450 dev_dbg(musb->controller, "Spurious SUSPENDM\n"); in musb_stage0_irq()
458 musb->port1_status |= in musb_stage0_irq()
461 musb->rh_timer = jiffies in musb_stage0_irq()
464 musb->xceiv->state = OTG_STATE_A_HOST; in musb_stage0_irq()
465 musb->is_active = 1; in musb_stage0_irq()
466 usb_hcd_resume_root_hub(musb_to_hcd(musb)); in musb_stage0_irq()
469 musb->xceiv->state = OTG_STATE_B_PERIPHERAL; in musb_stage0_irq()
470 musb->is_active = 1; in musb_stage0_irq()
471 MUSB_DEV_MODE(musb); in musb_stage0_irq()
476 otg_state_string(musb->xceiv->state)); in musb_stage0_irq()
479 switch (musb->xceiv->state) { in musb_stage0_irq()
482 musb->xceiv->state = OTG_STATE_A_HOST; in musb_stage0_irq()
483 usb_hcd_resume_root_hub(musb_to_hcd(musb)); in musb_stage0_irq()
493 musb->int_usb |= MUSB_INTR_DISCONNECT; in musb_stage0_irq()
494 musb->int_usb &= ~MUSB_INTR_SUSPEND; in musb_stage0_irq()
497 musb_g_resume(musb); in musb_stage0_irq()
500 musb->int_usb &= ~MUSB_INTR_SUSPEND; in musb_stage0_irq()
505 otg_state_string(musb->xceiv->state)); in musb_stage0_irq()
512 void __iomem *mbase = musb->mregs; in musb_stage0_irq()
516 dev_dbg(musb->controller, "SessReq while on B state\n"); in musb_stage0_irq()
520 dev_dbg(musb->controller, "SESSION_REQUEST (%s)\n", in musb_stage0_irq()
521 otg_state_string(musb->xceiv->state)); in musb_stage0_irq()
531 musb->ep0_stage = MUSB_EP0_START; in musb_stage0_irq()
532 musb->xceiv->state = OTG_STATE_A_IDLE; in musb_stage0_irq()
533 MUSB_HST_MODE(musb); in musb_stage0_irq()
534 musb_platform_set_vbus(musb, 1); in musb_stage0_irq()
558 switch (musb->xceiv->state) { in musb_stage0_irq()
568 if (musb->vbuserr_retry) { in musb_stage0_irq()
569 void __iomem *mbase = musb->mregs; in musb_stage0_irq()
571 musb->vbuserr_retry--; in musb_stage0_irq()
576 musb->port1_status |= in musb_stage0_irq()
585 dev_dbg(musb->controller, "VBUS_ERROR in %s (%02x, %s), retry #%d, port1 %08x\n", in musb_stage0_irq()
586 otg_state_string(musb->xceiv->state), in musb_stage0_irq()
600 VBUSERR_RETRY_COUNT - musb->vbuserr_retry, in musb_stage0_irq()
601 musb->port1_status); in musb_stage0_irq()
605 musb_platform_set_vbus(musb, 0); in musb_stage0_irq()
610 dev_dbg(musb->controller, "SUSPEND (%s) devctl %02x power %02x\n", in musb_stage0_irq()
611 otg_state_string(musb->xceiv->state), devctl, power); in musb_stage0_irq()
614 switch (musb->xceiv->state) { in musb_stage0_irq()
623 musb_hnp_stop(musb); in musb_stage0_irq()
624 usb_hcd_resume_root_hub(musb_to_hcd(musb)); in musb_stage0_irq()
625 musb_root_disconnect(musb); in musb_stage0_irq()
626 musb_platform_try_idle(musb, jiffies in musb_stage0_irq()
627 + msecs_to_jiffies(musb->a_wait_bcon in musb_stage0_irq()
632 if (!musb->is_active) in musb_stage0_irq()
635 musb_g_suspend(musb); in musb_stage0_irq()
636 musb->is_active = is_otg_enabled(musb) in musb_stage0_irq()
638 if (musb->is_active) { in musb_stage0_irq()
639 musb->xceiv->state = OTG_STATE_B_WAIT_ACON; in musb_stage0_irq()
640 dev_dbg(musb->controller, "HNP: Setting timer for b_ase0_brst\n"); in musb_stage0_irq()
641 mod_timer(&musb->otg_timer, jiffies in musb_stage0_irq()
647 if (musb->a_wait_bcon != 0) in musb_stage0_irq()
648 musb_platform_try_idle(musb, jiffies in musb_stage0_irq()
649 + msecs_to_jiffies(musb->a_wait_bcon)); in musb_stage0_irq()
652 musb->xceiv->state = OTG_STATE_A_SUSPEND; in musb_stage0_irq()
653 musb->is_active = is_otg_enabled(musb) in musb_stage0_irq()
658 dev_dbg(musb->controller, "REVISIT: SUSPEND as B_HOST\n"); in musb_stage0_irq()
662 musb->is_active = 0; in musb_stage0_irq()
669 struct usb_hcd *hcd = musb_to_hcd(musb); in musb_stage0_irq()
672 musb->is_active = 1; in musb_stage0_irq()
674 musb->ep0_stage = MUSB_EP0_START; in musb_stage0_irq()
677 if (is_peripheral_active(musb)) { in musb_stage0_irq()
680 musb_writew(musb->mregs, MUSB_INTRTXE, musb->epmask); in musb_stage0_irq()
681 musb_writew(musb->mregs, MUSB_INTRRXE, musb->epmask & 0xfffe); in musb_stage0_irq()
682 musb_writeb(musb->mregs, MUSB_INTRUSBE, 0xf7); in musb_stage0_irq()
684 musb->port1_status &= ~(USB_PORT_STAT_LOW_SPEED in musb_stage0_irq()
688 musb->port1_status |= USB_PORT_STAT_CONNECTION in musb_stage0_irq()
693 musb->port1_status |= USB_PORT_STAT_LOW_SPEED; in musb_stage0_irq()
696 switch (musb->xceiv->state) { in musb_stage0_irq()
699 dev_dbg(musb->controller, "HNP: SUSPEND+CONNECT, now b_host\n"); in musb_stage0_irq()
703 dev_dbg(musb->controller, "CONNECT as b_peripheral???\n"); in musb_stage0_irq()
706 dev_dbg(musb->controller, "HNP: CONNECT, now b_host\n"); in musb_stage0_irq()
708 musb->xceiv->state = OTG_STATE_B_HOST; in musb_stage0_irq()
710 musb->ignore_disconnect = 0; in musb_stage0_irq()
711 del_timer(&musb->otg_timer); in musb_stage0_irq()
716 musb->xceiv->state = OTG_STATE_A_HOST; in musb_stage0_irq()
723 MUSB_HST_MODE(musb); in musb_stage0_irq()
729 dev_dbg(musb->controller, "CONNECT (%s) devctl %02x\n", in musb_stage0_irq()
730 otg_state_string(musb->xceiv->state), devctl); in musb_stage0_irq()
735 if ((int_usb & MUSB_INTR_DISCONNECT) && !musb->ignore_disconnect) { in musb_stage0_irq()
736 dev_dbg(musb->controller, "DISCONNECT (%s) as %s, devctl %02x\n", in musb_stage0_irq()
737 otg_state_string(musb->xceiv->state), in musb_stage0_irq()
738 MUSB_MODE(musb), devctl); in musb_stage0_irq()
741 switch (musb->xceiv->state) { in musb_stage0_irq()
744 usb_hcd_resume_root_hub(musb_to_hcd(musb)); in musb_stage0_irq()
745 musb_root_disconnect(musb); in musb_stage0_irq()
746 if (musb->a_wait_bcon != 0 && is_otg_enabled(musb)) in musb_stage0_irq()
747 musb_platform_try_idle(musb, jiffies in musb_stage0_irq()
748 + msecs_to_jiffies(musb->a_wait_bcon)); in musb_stage0_irq()
756 musb_root_disconnect(musb); in musb_stage0_irq()
757 musb_to_hcd(musb)->self.is_b_host = 0; in musb_stage0_irq()
758 musb->xceiv->state = OTG_STATE_B_PERIPHERAL; in musb_stage0_irq()
759 MUSB_DEV_MODE(musb); in musb_stage0_irq()
760 musb_g_disconnect(musb); in musb_stage0_irq()
763 musb_hnp_stop(musb); in musb_stage0_irq()
764 musb_root_disconnect(musb); in musb_stage0_irq()
770 musb_g_disconnect(musb); in musb_stage0_irq()
774 otg_state_string(musb->xceiv->state)); in musb_stage0_irq()
793 dev_dbg(musb->controller, "BABBLE devctl: %02x\n", devctl); in musb_stage0_irq()
796 musb_writeb(musb->mregs, MUSB_DEVCTL, 0); in musb_stage0_irq()
799 dev_dbg(musb->controller, "BUS RESET as %s\n", in musb_stage0_irq()
800 otg_state_string(musb->xceiv->state)); in musb_stage0_irq()
801 switch (musb->xceiv->state) { in musb_stage0_irq()
807 musb->ignore_disconnect = 1; in musb_stage0_irq()
808 musb_g_reset(musb); in musb_stage0_irq()
812 dev_dbg(musb->controller, "HNP: in %s, %d msec timeout\n", in musb_stage0_irq()
813 otg_state_string(musb->xceiv->state), in musb_stage0_irq()
814 TA_WAIT_BCON(musb)); in musb_stage0_irq()
815 mod_timer(&musb->otg_timer, jiffies in musb_stage0_irq()
816 + msecs_to_jiffies(TA_WAIT_BCON(musb))); in musb_stage0_irq()
819 musb->ignore_disconnect = 0; in musb_stage0_irq()
820 del_timer(&musb->otg_timer); in musb_stage0_irq()
821 musb_g_reset(musb); in musb_stage0_irq()
824 dev_dbg(musb->controller, "HNP: RESET (%s), to b_peripheral\n", in musb_stage0_irq()
825 otg_state_string(musb->xceiv->state)); in musb_stage0_irq()
826 musb->xceiv->state = OTG_STATE_B_PERIPHERAL; in musb_stage0_irq()
827 musb_g_reset(musb); in musb_stage0_irq()
830 musb->xceiv->state = OTG_STATE_B_PERIPHERAL; in musb_stage0_irq()
833 musb_g_reset(musb); in musb_stage0_irq()
836 dev_dbg(musb->controller, "Unhandled BUS RESET as %s\n", in musb_stage0_irq()
837 otg_state_string(musb->xceiv->state)); in musb_stage0_irq()
856 void __iomem *mbase = musb->mregs; in musb_stage0_irq()
861 dev_dbg(musb->controller, "START_OF_FRAME\n"); in musb_stage0_irq()
866 ep = musb->endpoints; in musb_stage0_irq()
867 for (epnum = 1; (epnum < musb->nr_endpoints) in musb_stage0_irq()
868 && (musb->epmask >= (1 << epnum)); in musb_stage0_irq()
880 musb_h_tx_start(musb, epnum); in musb_stage0_irq()
882 cppi_hostdma_start(musb, epnum); in musb_stage0_irq()
888 schedule_work(&musb->irq_work); in musb_stage0_irq()
899 void musb_start(struct musb *musb) in musb_start() argument
901 int musb_start(struct musb *musb) in musb_start()
904 void __iomem *regs = musb->mregs; in musb_start()
910 dev_dbg(musb->controller, "<== devctl %02x\n", devctl); in musb_start()
913 musb_writew(regs, MUSB_INTRTXE, musb->epmask); in musb_start()
914 musb_writew(regs, MUSB_INTRRXE, musb->epmask & 0xfffe); in musb_start()
926 musb->is_active = 0; in musb_start()
930 if (is_otg_enabled(musb)) { in musb_start()
938 musb->is_active = 1; in musb_start()
943 } else if (is_host_enabled(musb)) { in musb_start()
949 musb->is_active = 1; in musb_start()
953 musb_platform_enable(musb); in musb_start()
955 ret = musb_platform_enable(musb); in musb_start()
957 musb->is_active = 0; in musb_start()
969 static void musb_generic_disable(struct musb *musb) in musb_generic_disable() argument
971 void __iomem *mbase = musb->mregs; in musb_generic_disable()
996 void musb_stop(struct musb *musb) in musb_stop() argument
999 musb_platform_disable(musb); in musb_stop()
1000 musb_generic_disable(musb); in musb_stop()
1001 dev_dbg(musb->controller, "HDRC disabled\n"); in musb_stop()
1010 musb_platform_try_idle(musb, 0); in musb_stop()
1016 struct musb *musb = dev_to_musb(&pdev->dev); in musb_shutdown() local
1019 pm_runtime_get_sync(musb->controller); in musb_shutdown()
1021 musb_gadget_cleanup(musb); in musb_shutdown()
1023 spin_lock_irqsave(&musb->lock, flags); in musb_shutdown()
1024 musb_platform_disable(musb); in musb_shutdown()
1025 musb_generic_disable(musb); in musb_shutdown()
1026 spin_unlock_irqrestore(&musb->lock, flags); in musb_shutdown()
1028 if (!is_otg_enabled(musb) && is_host_enabled(musb)) in musb_shutdown()
1029 usb_remove_hcd(musb_to_hcd(musb)); in musb_shutdown()
1030 musb_writeb(musb->mregs, MUSB_DEVCTL, 0); in musb_shutdown()
1031 musb_platform_exit(musb); in musb_shutdown()
1033 pm_runtime_put(musb->controller); in musb_shutdown()
1183 fifo_setup(struct musb *musb, struct musb_hw_ep *hw_ep, in fifo_setup() argument
1186 void __iomem *mbase = musb->mregs; in fifo_setup()
1200 (1 << (musb->config->ram_bits + 2))) in fifo_setup()
1204 if ((offset + maxpacket) > (1 << (musb->config->ram_bits + 2))) in fifo_setup()
1215 musb->bulk_ep = hw_ep; in fifo_setup()
1248 musb->epmask |= (1 << hw_ep->epnum); in fifo_setup()
1257 static int __devinit ep_config_from_table(struct musb *musb) in ep_config_from_table() argument
1262 struct musb_hw_ep *hw_ep = musb->endpoints; in ep_config_from_table()
1264 if (musb->config->fifo_cfg) { in ep_config_from_table()
1265 cfg = musb->config->fifo_cfg; in ep_config_from_table()
1266 n = musb->config->fifo_cfg_size; in ep_config_from_table()
1303 offset = fifo_setup(musb, hw_ep, &ep0_cfg, 0); in ep_config_from_table()
1313 if (epn >= musb->config->num_eps) { in ep_config_from_table()
1318 offset = fifo_setup(musb, hw_ep + epn, cfg++, offset); in ep_config_from_table()
1325 musb->nr_endpoints = max(epn, musb->nr_endpoints); in ep_config_from_table()
1329 musb->config->num_eps * 2 - 1, offset, in ep_config_from_table()
1330 (1 << (musb->config->ram_bits + 2))); in ep_config_from_table()
1332 if (!musb->bulk_ep) { in ep_config_from_table()
1345 static int __devinit ep_config_from_hw(struct musb *musb) in ep_config_from_hw() argument
1349 void *mbase = musb->mregs; in ep_config_from_hw()
1352 dev_dbg(musb->controller, "<== static silicon ep config\n"); in ep_config_from_hw()
1356 for (epnum = 1; epnum < musb->config->num_eps; epnum++) { in ep_config_from_hw()
1358 hw_ep = musb->endpoints + epnum; in ep_config_from_hw()
1360 ret = musb_read_fifosize(musb, hw_ep, epnum); in ep_config_from_hw()
1374 if (musb->bulk_ep) in ep_config_from_hw()
1376 musb->bulk_ep = hw_ep; in ep_config_from_hw()
1379 if (!musb->bulk_ep) { in ep_config_from_hw()
1392 static int __devinit musb_core_init(u16 musb_type, struct musb *musb) in musb_core_init() argument
1397 void __iomem *mbase = musb->mregs; in musb_core_init()
1407 musb->dyn_fifo = true; in musb_core_init()
1412 musb->bulk_combine = true; in musb_core_init()
1416 musb->bulk_split = true; in musb_core_init()
1419 musb->bulk_combine = false; in musb_core_init()
1420 musb->bulk_split = false; in musb_core_init()
1424 musb->hb_iso_rx = true; in musb_core_init()
1428 musb->hb_iso_tx = true; in musb_core_init()
1437 musb->is_multipoint = 1; in musb_core_init()
1440 musb->is_multipoint = 0; in musb_core_init()
1450 musb->hwvers = musb_read_hwvers(mbase); in musb_core_init()
1451 snprintf(aRevision, 32, "%d.%d%s", MUSB_HWVERS_MAJOR(musb->hwvers), in musb_core_init()
1452 MUSB_HWVERS_MINOR(musb->hwvers), in musb_core_init()
1453 (musb->hwvers & MUSB_HWVERS_RC) ? "RC" : ""); in musb_core_init()
1458 musb_configure_ep0(musb); in musb_core_init()
1461 musb->nr_endpoints = 1; in musb_core_init()
1462 musb->epmask = 1; in musb_core_init()
1464 if (musb->dyn_fifo) in musb_core_init()
1465 status = ep_config_from_table(musb); in musb_core_init()
1467 status = ep_config_from_hw(musb); in musb_core_init()
1473 for (i = 0; i < musb->nr_endpoints; i++) { in musb_core_init()
1474 struct musb_hw_ep *hw_ep = musb->endpoints + i; in musb_core_init()
1478 hw_ep->fifo_async = musb->async + 0x400 + MUSB_FIFO_OFFSET(i); in musb_core_init()
1479 hw_ep->fifo_sync = musb->sync + 0x400 + MUSB_FIFO_OFFSET(i); in musb_core_init()
1481 musb->sync_va + 0x400 + MUSB_FIFO_OFFSET(i); in musb_core_init()
1495 dev_dbg(musb->controller, in musb_core_init()
1504 dev_dbg(musb->controller, in musb_core_init()
1513 dev_dbg(musb->controller, "hw_ep %d not configured\n", i); in musb_core_init()
1528 struct musb *musb = __hci; in generic_interrupt() local
1530 spin_lock_irqsave(&musb->lock, flags); in generic_interrupt()
1532 musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB); in generic_interrupt()
1533 musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX); in generic_interrupt()
1534 musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX); in generic_interrupt()
1536 if (musb->int_usb || musb->int_tx || musb->int_rx) in generic_interrupt()
1537 retval = musb_interrupt(musb); in generic_interrupt()
1539 spin_unlock_irqrestore(&musb->lock, flags); in generic_interrupt()
1555 irqreturn_t musb_interrupt(struct musb *musb) in musb_interrupt() argument
1562 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); in musb_interrupt()
1563 power = musb_readb(musb->mregs, MUSB_POWER); in musb_interrupt()
1565 dev_dbg(musb->controller, "** IRQ %s usb%04x tx%04x rx%04x\n", in musb_interrupt()
1567 musb->int_usb, musb->int_tx, musb->int_rx); in musb_interrupt()
1572 if (musb->int_usb) in musb_interrupt()
1573 retval |= musb_stage0_irq(musb, musb->int_usb, in musb_interrupt()
1579 if (musb->int_tx & 1) { in musb_interrupt()
1582 retval |= musb_h_ep0_irq(musb); in musb_interrupt()
1585 retval |= musb_g_ep0_irq(musb); in musb_interrupt()
1590 reg = musb->int_rx >> 1; in musb_interrupt()
1599 musb_host_rx(musb, ep_num); in musb_interrupt()
1602 musb_g_rx(musb, ep_num); in musb_interrupt()
1611 reg = musb->int_tx >> 1; in musb_interrupt()
1620 musb_host_tx(musb, ep_num); in musb_interrupt()
1623 musb_g_tx(musb, ep_num); in musb_interrupt()
1641 void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit) in musb_dma_completion() argument
1643 u8 devctl = musb_readb(musb->mregs, MUSB_DEVCTL); in musb_dma_completion()
1652 musb_h_ep0_irq(musb); in musb_dma_completion()
1654 musb_g_ep0_irq(musb); in musb_dma_completion()
1662 musb_host_tx(musb, epnum); in musb_dma_completion()
1665 musb_g_tx(musb, epnum); in musb_dma_completion()
1671 musb_host_rx(musb, epnum); in musb_dma_completion()
1674 musb_g_rx(musb, epnum); in musb_dma_completion()
1692 struct musb *musb = dev_to_musb(dev); in musb_mode_show() local
1696 spin_lock_irqsave(&musb->lock, flags); in musb_mode_show()
1697 ret = sprintf(buf, "%s\n", otg_state_string(musb->xceiv->state)); in musb_mode_show()
1698 spin_unlock_irqrestore(&musb->lock, flags); in musb_mode_show()
1707 struct musb *musb = dev_to_musb(dev); in musb_mode_store() local
1711 spin_lock_irqsave(&musb->lock, flags); in musb_mode_store()
1713 status = musb_platform_set_mode(musb, MUSB_HOST); in musb_mode_store()
1715 status = musb_platform_set_mode(musb, MUSB_PERIPHERAL); in musb_mode_store()
1717 status = musb_platform_set_mode(musb, MUSB_OTG); in musb_mode_store()
1720 spin_unlock_irqrestore(&musb->lock, flags); in musb_mode_store()
1730 struct musb *musb = dev_to_musb(dev); in musb_vbus_store() local
1739 spin_lock_irqsave(&musb->lock, flags); in musb_vbus_store()
1741 musb->a_wait_bcon = val ? max_t(int, val, OTG_TIME_A_WAIT_BCON) : 0 ; in musb_vbus_store()
1742 if (musb->xceiv->state == OTG_STATE_A_WAIT_BCON) in musb_vbus_store()
1743 musb->is_active = 0; in musb_vbus_store()
1744 musb_platform_try_idle(musb, jiffies + msecs_to_jiffies(val)); in musb_vbus_store()
1745 spin_unlock_irqrestore(&musb->lock, flags); in musb_vbus_store()
1753 struct musb *musb = dev_to_musb(dev); in musb_vbus_show() local
1758 spin_lock_irqsave(&musb->lock, flags); in musb_vbus_show()
1759 val = musb->a_wait_bcon; in musb_vbus_show()
1763 vbus = musb_platform_get_vbus_status(musb); in musb_vbus_show()
1764 spin_unlock_irqrestore(&musb->lock, flags); in musb_vbus_show()
1778 struct musb *musb = dev_to_musb(dev); in musb_srp_store() local
1788 musb_g_wakeup(musb); in musb_srp_store()
1811 struct musb *musb = container_of(data, struct musb, irq_work); in musb_irq_work() local
1814 if (musb->xceiv->state != old_state) { in musb_irq_work()
1815 old_state = musb->xceiv->state; in musb_irq_work()
1816 sysfs_notify(&musb->controller->kobj, NULL, "mode"); in musb_irq_work()
1825 static struct musb *__devinit
1829 struct musb *musb; in allocate_instance() local
1840 musb = hcd_to_musb(hcd); in allocate_instance()
1842 musb = calloc(1, sizeof(*musb)); in allocate_instance()
1843 if (!musb) in allocate_instance()
1846 INIT_LIST_HEAD(&musb->control); in allocate_instance()
1847 INIT_LIST_HEAD(&musb->in_bulk); in allocate_instance()
1848 INIT_LIST_HEAD(&musb->out_bulk); in allocate_instance()
1855 musb->vbuserr_retry = VBUSERR_RETRY_COUNT; in allocate_instance()
1856 musb->a_wait_bcon = OTG_TIME_A_WAIT_BCON; in allocate_instance()
1857 dev_set_drvdata(dev, musb); in allocate_instance()
1858 musb->mregs = mbase; in allocate_instance()
1859 musb->ctrl_base = mbase; in allocate_instance()
1860 musb->nIrq = -ENODEV; in allocate_instance()
1861 musb->config = config; in allocate_instance()
1862 BUG_ON(musb->config->num_eps > MUSB_C_NUM_EPS); in allocate_instance()
1863 for (epnum = 0, ep = musb->endpoints; in allocate_instance()
1864 epnum < musb->config->num_eps; in allocate_instance()
1866 ep->musb = musb; in allocate_instance()
1870 musb->controller = dev; in allocate_instance()
1872 return musb; in allocate_instance()
1875 static void musb_free(struct musb *musb) in musb_free() argument
1883 sysfs_remove_group(&musb->controller->kobj, &musb_attr_group); in musb_free()
1886 if (musb->nIrq >= 0) { in musb_free()
1887 if (musb->irq_wake) in musb_free()
1888 disable_irq_wake(musb->nIrq); in musb_free()
1889 free_irq(musb->nIrq, musb); in musb_free()
1891 if (is_dma_capable() && musb->dma_controller) { in musb_free()
1892 struct dma_controller *c = musb->dma_controller; in musb_free()
1898 kfree(musb); in musb_free()
1913 struct musb * in musb_init_controller()
1919 struct musb *musb; in musb_init_controller() local
1936 musb = allocate_instance(dev, plat->config, ctrl); in musb_init_controller()
1937 if (!musb) { in musb_init_controller()
1942 pm_runtime_use_autosuspend(musb->controller); in musb_init_controller()
1943 pm_runtime_set_autosuspend_delay(musb->controller, 200); in musb_init_controller()
1944 pm_runtime_enable(musb->controller); in musb_init_controller()
1946 spin_lock_init(&musb->lock); in musb_init_controller()
1947 musb->board_mode = plat->mode; in musb_init_controller()
1948 musb->board_set_power = plat->set_power; in musb_init_controller()
1949 musb->min_power = plat->min_power; in musb_init_controller()
1950 musb->ops = plat->platform_ops; in musb_init_controller()
1963 musb->isr = generic_interrupt; in musb_init_controller()
1964 status = musb_platform_init(musb); in musb_init_controller()
1968 if (!musb->isr) { in musb_init_controller()
1974 if (!musb->xceiv->io_ops) { in musb_init_controller()
1975 musb->xceiv->io_dev = musb->controller; in musb_init_controller()
1976 musb->xceiv->io_priv = musb->mregs; in musb_init_controller()
1977 musb->xceiv->io_ops = &musb_ulpi_access; in musb_init_controller()
1981 pm_runtime_get_sync(musb->controller); in musb_init_controller()
1987 c = dma_controller_create(musb, musb->mregs); in musb_init_controller()
1988 musb->dma_controller = c; in musb_init_controller()
1995 if (!is_dma_capable() || !musb->dma_controller) in musb_init_controller()
2000 musb_platform_disable(musb); in musb_init_controller()
2001 musb_generic_disable(musb); in musb_init_controller()
2006 : MUSB_CONTROLLER_HDRC, musb); in musb_init_controller()
2010 setup_timer(&musb->otg_timer, musb_otg_timer_func, (unsigned long) musb); in musb_init_controller()
2013 INIT_WORK(&musb->irq_work, musb_irq_work); in musb_init_controller()
2016 if (request_irq(nIrq, musb->isr, 0, dev_name(dev), musb)) { in musb_init_controller()
2021 musb->nIrq = nIrq; in musb_init_controller()
2024 musb->irq_wake = 1; in musb_init_controller()
2027 musb->irq_wake = 0; in musb_init_controller()
2032 if (is_host_enabled(musb)) { in musb_init_controller()
2033 struct usb_hcd *hcd = musb_to_hcd(musb); in musb_init_controller()
2035 otg_set_host(musb->xceiv->otg, &hcd->self); in musb_init_controller()
2037 if (is_otg_enabled(musb)) in musb_init_controller()
2039 musb->xceiv->otg->host = &hcd->self; in musb_init_controller()
2044 u8 busctl = musb_read_ulpi_buscontrol(musb->mregs); in musb_init_controller()
2046 musb_write_ulpi_buscontrol(musb->mregs, busctl); in musb_init_controller()
2055 if (!is_otg_enabled(musb) && is_host_enabled(musb)) { in musb_init_controller()
2056 struct usb_hcd *hcd = musb_to_hcd(musb); in musb_init_controller()
2058 MUSB_HST_MODE(musb); in musb_init_controller()
2060 musb->xceiv->otg->default_a = 1; in musb_init_controller()
2061 musb->xceiv->state = OTG_STATE_A_IDLE; in musb_init_controller()
2063 status = usb_add_hcd(musb_to_hcd(musb), 0, 0); in musb_init_controller()
2066 dev_dbg(musb->controller, "%s mode, status %d, devctl %02x %c\n", in musb_init_controller()
2068 musb_readb(musb->mregs, MUSB_DEVCTL), in musb_init_controller()
2069 (musb_readb(musb->mregs, MUSB_DEVCTL) in musb_init_controller()
2075 MUSB_DEV_MODE(musb); in musb_init_controller()
2077 musb->xceiv->otg->default_a = 0; in musb_init_controller()
2078 musb->xceiv->state = OTG_STATE_B_IDLE; in musb_init_controller()
2082 status = musb_gadget_setup(musb); in musb_init_controller()
2085 dev_dbg(musb->controller, "%s mode, status %d, dev%02x\n", in musb_init_controller()
2086 is_otg_enabled(musb) ? "OTG" : "PERIPHERAL", in musb_init_controller()
2088 musb_readb(musb->mregs, MUSB_DEVCTL)); in musb_init_controller()
2095 status = musb_init_debugfs(musb); in musb_init_controller()
2100 status = sysfs_create_group(&musb->controller->kobj, &musb_attr_group); in musb_init_controller()
2105 pm_runtime_put(musb->controller); in musb_init_controller()
2109 switch (musb->board_mode) { in musb_init_controller()
2115 (is_dma_capable() && musb->dma_controller) in musb_init_controller()
2117 musb->nIrq); in musb_init_controller()
2122 return status == 0 ? musb : NULL; in musb_init_controller()
2126 musb_exit_debugfs(musb); in musb_init_controller()
2130 if (!is_otg_enabled(musb) && is_host_enabled(musb)) in musb_init_controller()
2131 usb_remove_hcd(musb_to_hcd(musb)); in musb_init_controller()
2134 musb_gadget_cleanup(musb); in musb_init_controller()
2137 pm_runtime_put_sync(musb->controller); in musb_init_controller()
2140 if (musb->irq_wake) in musb_init_controller()
2142 musb_platform_exit(musb); in musb_init_controller()
2145 dev_err(musb->controller, in musb_init_controller()
2148 musb_free(musb); in musb_init_controller()
2155 return status == 0 ? musb : NULL; in musb_init_controller()
2202 struct musb *musb = dev_to_musb(&pdev->dev); in musb_remove() local
2203 void __iomem *ctrl_base = musb->ctrl_base; in musb_remove()
2210 musb_exit_debugfs(musb); in musb_remove()
2213 musb_free(musb); in musb_remove()
2224 static void musb_save_context(struct musb *musb) in musb_save_context() argument
2227 void __iomem *musb_base = musb->mregs; in musb_save_context()
2230 if (is_host_enabled(musb)) { in musb_save_context()
2231 musb->context.frame = musb_readw(musb_base, MUSB_FRAME); in musb_save_context()
2232 musb->context.testmode = musb_readb(musb_base, MUSB_TESTMODE); in musb_save_context()
2233 musb->context.busctl = musb_read_ulpi_buscontrol(musb->mregs); in musb_save_context()
2235 musb->context.power = musb_readb(musb_base, MUSB_POWER); in musb_save_context()
2236 musb->context.intrtxe = musb_readw(musb_base, MUSB_INTRTXE); in musb_save_context()
2237 musb->context.intrrxe = musb_readw(musb_base, MUSB_INTRRXE); in musb_save_context()
2238 musb->context.intrusbe = musb_readb(musb_base, MUSB_INTRUSBE); in musb_save_context()
2239 musb->context.index = musb_readb(musb_base, MUSB_INDEX); in musb_save_context()
2240 musb->context.devctl = musb_readb(musb_base, MUSB_DEVCTL); in musb_save_context()
2242 for (i = 0; i < musb->config->num_eps; ++i) { in musb_save_context()
2245 hw_ep = &musb->endpoints[i]; in musb_save_context()
2254 musb->context.index_regs[i].txmaxp = in musb_save_context()
2256 musb->context.index_regs[i].txcsr = in musb_save_context()
2258 musb->context.index_regs[i].rxmaxp = in musb_save_context()
2260 musb->context.index_regs[i].rxcsr = in musb_save_context()
2263 if (musb->dyn_fifo) { in musb_save_context()
2264 musb->context.index_regs[i].txfifoadd = in musb_save_context()
2266 musb->context.index_regs[i].rxfifoadd = in musb_save_context()
2268 musb->context.index_regs[i].txfifosz = in musb_save_context()
2270 musb->context.index_regs[i].rxfifosz = in musb_save_context()
2273 if (is_host_enabled(musb)) { in musb_save_context()
2274 musb->context.index_regs[i].txtype = in musb_save_context()
2276 musb->context.index_regs[i].txinterval = in musb_save_context()
2278 musb->context.index_regs[i].rxtype = in musb_save_context()
2280 musb->context.index_regs[i].rxinterval = in musb_save_context()
2283 musb->context.index_regs[i].txfunaddr = in musb_save_context()
2285 musb->context.index_regs[i].txhubaddr = in musb_save_context()
2287 musb->context.index_regs[i].txhubport = in musb_save_context()
2290 musb->context.index_regs[i].rxfunaddr = in musb_save_context()
2292 musb->context.index_regs[i].rxhubaddr = in musb_save_context()
2294 musb->context.index_regs[i].rxhubport = in musb_save_context()
2300 static void musb_restore_context(struct musb *musb) in musb_restore_context() argument
2303 void __iomem *musb_base = musb->mregs; in musb_restore_context()
2307 if (is_host_enabled(musb)) { in musb_restore_context()
2308 musb_writew(musb_base, MUSB_FRAME, musb->context.frame); in musb_restore_context()
2309 musb_writeb(musb_base, MUSB_TESTMODE, musb->context.testmode); in musb_restore_context()
2310 musb_write_ulpi_buscontrol(musb->mregs, musb->context.busctl); in musb_restore_context()
2312 musb_writeb(musb_base, MUSB_POWER, musb->context.power); in musb_restore_context()
2313 musb_writew(musb_base, MUSB_INTRTXE, musb->context.intrtxe); in musb_restore_context()
2314 musb_writew(musb_base, MUSB_INTRRXE, musb->context.intrrxe); in musb_restore_context()
2315 musb_writeb(musb_base, MUSB_INTRUSBE, musb->context.intrusbe); in musb_restore_context()
2316 musb_writeb(musb_base, MUSB_DEVCTL, musb->context.devctl); in musb_restore_context()
2318 for (i = 0; i < musb->config->num_eps; ++i) { in musb_restore_context()
2321 hw_ep = &musb->endpoints[i]; in musb_restore_context()
2331 musb->context.index_regs[i].txmaxp); in musb_restore_context()
2333 musb->context.index_regs[i].txcsr); in musb_restore_context()
2335 musb->context.index_regs[i].rxmaxp); in musb_restore_context()
2337 musb->context.index_regs[i].rxcsr); in musb_restore_context()
2339 if (musb->dyn_fifo) { in musb_restore_context()
2341 musb->context.index_regs[i].txfifosz); in musb_restore_context()
2343 musb->context.index_regs[i].rxfifosz); in musb_restore_context()
2345 musb->context.index_regs[i].txfifoadd); in musb_restore_context()
2347 musb->context.index_regs[i].rxfifoadd); in musb_restore_context()
2350 if (is_host_enabled(musb)) { in musb_restore_context()
2352 musb->context.index_regs[i].txtype); in musb_restore_context()
2354 musb->context.index_regs[i].txinterval); in musb_restore_context()
2356 musb->context.index_regs[i].rxtype); in musb_restore_context()
2359 musb->context.index_regs[i].rxinterval); in musb_restore_context()
2361 musb->context.index_regs[i].txfunaddr); in musb_restore_context()
2363 musb->context.index_regs[i].txhubaddr); in musb_restore_context()
2365 musb->context.index_regs[i].txhubport); in musb_restore_context()
2371 musb->context.index_regs[i].rxfunaddr); in musb_restore_context()
2373 musb->context.index_regs[i].rxhubaddr); in musb_restore_context()
2375 musb->context.index_regs[i].rxhubport); in musb_restore_context()
2378 musb_writeb(musb_base, MUSB_INDEX, musb->context.index); in musb_restore_context()
2383 struct musb *musb = dev_to_musb(dev); in musb_suspend() local
2386 spin_lock_irqsave(&musb->lock, flags); in musb_suspend()
2388 if (is_peripheral_active(musb)) { in musb_suspend()
2392 } else if (is_host_active(musb)) { in musb_suspend()
2398 spin_unlock_irqrestore(&musb->lock, flags); in musb_suspend()
2413 struct musb *musb = dev_to_musb(dev); in musb_runtime_suspend() local
2415 musb_save_context(musb); in musb_runtime_suspend()
2422 struct musb *musb = dev_to_musb(dev); in musb_runtime_resume() local
2435 musb_restore_context(musb); in musb_runtime_resume()