Lines Matching refs:maxpacket
1078 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
1079 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
1080 { .hw_ep_num = 2, .style = FIFO_RXTX, .maxpacket = 512, },
1081 { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, },
1082 { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, },
1087 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1088 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1089 { .hw_ep_num = 2, .style = FIFO_RXTX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1090 { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, },
1091 { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, },
1096 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
1097 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
1098 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
1099 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
1100 { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, },
1101 { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, },
1106 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1107 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, .mode = BUF_DOUBLE, },
1108 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
1109 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
1110 { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, },
1111 { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, },
1116 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
1117 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
1118 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
1119 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
1120 { .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, },
1121 { .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, },
1122 { .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, },
1123 { .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, },
1124 { .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, },
1125 { .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, },
1126 { .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 512, },
1127 { .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 512, },
1128 { .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 512, },
1129 { .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 512, },
1130 { .hw_ep_num = 8, .style = FIFO_TX, .maxpacket = 512, },
1131 { .hw_ep_num = 8, .style = FIFO_RX, .maxpacket = 512, },
1132 { .hw_ep_num = 9, .style = FIFO_TX, .maxpacket = 512, },
1133 { .hw_ep_num = 9, .style = FIFO_RX, .maxpacket = 512, },
1134 { .hw_ep_num = 10, .style = FIFO_TX, .maxpacket = 256, },
1135 { .hw_ep_num = 10, .style = FIFO_RX, .maxpacket = 64, },
1136 { .hw_ep_num = 11, .style = FIFO_TX, .maxpacket = 256, },
1137 { .hw_ep_num = 11, .style = FIFO_RX, .maxpacket = 64, },
1138 { .hw_ep_num = 12, .style = FIFO_TX, .maxpacket = 256, },
1139 { .hw_ep_num = 12, .style = FIFO_RX, .maxpacket = 64, },
1140 { .hw_ep_num = 13, .style = FIFO_RXTX, .maxpacket = 4096, },
1141 { .hw_ep_num = 14, .style = FIFO_RXTX, .maxpacket = 1024, },
1142 { .hw_ep_num = 15, .style = FIFO_RXTX, .maxpacket = 1024, },
1147 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
1148 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
1149 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, },
1150 { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, },
1151 { .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, },
1152 { .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, },
1153 { .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, },
1154 { .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, },
1155 { .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, },
1156 { .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, },
1157 { .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 32, },
1158 { .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 32, },
1159 { .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 32, },
1160 { .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 32, },
1161 { .hw_ep_num = 8, .style = FIFO_TX, .maxpacket = 32, },
1162 { .hw_ep_num = 8, .style = FIFO_RX, .maxpacket = 32, },
1163 { .hw_ep_num = 9, .style = FIFO_TX, .maxpacket = 32, },
1164 { .hw_ep_num = 9, .style = FIFO_RX, .maxpacket = 32, },
1165 { .hw_ep_num = 10, .style = FIFO_TX, .maxpacket = 32, },
1166 { .hw_ep_num = 10, .style = FIFO_RX, .maxpacket = 32, },
1167 { .hw_ep_num = 11, .style = FIFO_TX, .maxpacket = 32, },
1168 { .hw_ep_num = 11, .style = FIFO_RX, .maxpacket = 32, },
1169 { .hw_ep_num = 12, .style = FIFO_TX, .maxpacket = 32, },
1170 { .hw_ep_num = 12, .style = FIFO_RX, .maxpacket = 32, },
1171 { .hw_ep_num = 13, .style = FIFO_RXTX, .maxpacket = 512, },
1172 { .hw_ep_num = 14, .style = FIFO_RXTX, .maxpacket = 1024, },
1173 { .hw_ep_num = 15, .style = FIFO_RXTX, .maxpacket = 1024, },
1188 u16 maxpacket = cfg->maxpacket; in fifo_setup() local
1194 size = ffs(max(maxpacket, (u16) 8)) - 1; in fifo_setup()
1195 maxpacket = 1 << size; in fifo_setup()
1199 if ((offset + (maxpacket << 1)) > in fifo_setup()
1204 if ((offset + maxpacket) > (1 << (musb->config->ram_bits + 2))) in fifo_setup()
1222 hw_ep->max_packet_sz_tx = maxpacket; in fifo_setup()
1228 hw_ep->max_packet_sz_rx = maxpacket; in fifo_setup()
1234 hw_ep->max_packet_sz_rx = maxpacket; in fifo_setup()
1239 hw_ep->max_packet_sz_tx = maxpacket; in fifo_setup()
1250 return offset + (maxpacket << ((c_size & MUSB_FIFOSZ_DPB) ? 1 : 0)); in fifo_setup()
1254 .style = FIFO_RXTX, .maxpacket = 64,