225 			'T', hw_ep->epnum, fifo, len, src);  in musb_write_fifo()
265 			'R', hw_ep->epnum, fifo, len, dst);  in musb_read_fifo()
858 		u8 epnum;  in musb_stage0_irq()
867 		for (epnum = 1; (epnum < musb->nr_endpoints)  in musb_stage0_irq()
868 					&& (musb->epmask >= (1 << epnum));  in musb_stage0_irq()
869 				epnum++, ep++) {  in musb_stage0_irq()
878 					epnum);  in musb_stage0_irq()
880 					musb_h_tx_start(musb, epnum);  in musb_stage0_irq()
882 					cppi_hostdma_start(musb, epnum);  in musb_stage0_irq()
1209 	musb_writeb(mbase, MUSB_INDEX, hw_ep->epnum);  in fifo_setup()
1214 	if (hw_ep->epnum == 1)  in fifo_setup()
1248 	musb->epmask |= (1 << hw_ep->epnum);  in fifo_setup()
1347 	u8 epnum = 0;  in ep_config_from_hw()  local
1356 	for (epnum = 1; epnum < musb->config->num_eps; epnum++) {  in ep_config_from_hw()
1357 		musb_ep_select(mbase, epnum);  in ep_config_from_hw()
1358 		hw_ep = musb->endpoints + epnum;  in ep_config_from_hw()
1360 		ret = musb_read_fifosize(musb, hw_ep, epnum);  in ep_config_from_hw()
1641 void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit)  in musb_dma_completion()  argument
1647 	if (!epnum) {  in musb_dma_completion()
1662 					musb_host_tx(musb, epnum);  in musb_dma_completion()
1665 					musb_g_tx(musb, epnum);  in musb_dma_completion()
1671 					musb_host_rx(musb, epnum);  in musb_dma_completion()
1674 					musb_g_rx(musb, epnum);  in musb_dma_completion()
1831 	int			epnum;  in allocate_instance()  local
1863 	for (epnum = 0, ep = musb->endpoints;  in allocate_instance()
1864 			epnum < musb->config->num_eps;  in allocate_instance()
1865 			epnum++, ep++) {  in allocate_instance()
1867 		ep->epnum = epnum;  in allocate_instance()