Lines Matching refs:usbcfg
335 uint32_t usbcfg = 0; in dwc_otg_core_init() local
339 usbcfg = readl(®s->gusbcfg); in dwc_otg_core_init()
343 usbcfg |= DWC2_GUSBCFG_ULPI_EXT_VBUS_DRV; in dwc_otg_core_init()
345 usbcfg |= DWC2_GUSBCFG_ULPI_INT_VBUS_INDICATOR | in dwc_otg_core_init()
349 usbcfg &= ~DWC2_GUSBCFG_ULPI_EXT_VBUS_DRV; in dwc_otg_core_init()
354 usbcfg |= DWC2_GUSBCFG_TERM_SEL_DL_PULSE; in dwc_otg_core_init()
356 usbcfg &= ~DWC2_GUSBCFG_TERM_SEL_DL_PULSE; in dwc_otg_core_init()
358 writel(usbcfg, ®s->gusbcfg); in dwc_otg_core_init()
402 usbcfg &= ~(DWC2_GUSBCFG_ULPI_UTMI_SEL | DWC2_GUSBCFG_PHYIF); in dwc_otg_core_init()
403 usbcfg |= CONFIG_DWC2_PHY_TYPE << DWC2_GUSBCFG_ULPI_UTMI_SEL_OFFSET; in dwc_otg_core_init()
405 if (usbcfg & DWC2_GUSBCFG_ULPI_UTMI_SEL) { /* ULPI interface */ in dwc_otg_core_init()
407 usbcfg |= DWC2_GUSBCFG_DDRSEL; in dwc_otg_core_init()
409 usbcfg &= ~DWC2_GUSBCFG_DDRSEL; in dwc_otg_core_init()
413 usbcfg |= DWC2_GUSBCFG_PHYIF; in dwc_otg_core_init()
417 writel(usbcfg, ®s->gusbcfg); in dwc_otg_core_init()
423 usbcfg = readl(®s->gusbcfg); in dwc_otg_core_init()
424 usbcfg &= ~(DWC2_GUSBCFG_ULPI_FSLS | DWC2_GUSBCFG_ULPI_CLK_SUS_M); in dwc_otg_core_init()
432 usbcfg |= DWC2_GUSBCFG_ULPI_FSLS; in dwc_otg_core_init()
433 usbcfg |= DWC2_GUSBCFG_ULPI_CLK_SUS_M; in dwc_otg_core_init()
437 usbcfg |= DWC2_GUSBCFG_FORCEHOSTMODE; in dwc_otg_core_init()
439 writel(usbcfg, ®s->gusbcfg); in dwc_otg_core_init()
446 if (usbcfg & DWC2_GUSBCFG_FORCEHOSTMODE) in dwc_otg_core_init()
476 usbcfg = 0; in dwc_otg_core_init()
479 usbcfg |= DWC2_GUSBCFG_HNPCAP | DWC2_GUSBCFG_SRPCAP; in dwc_otg_core_init()
481 usbcfg |= DWC2_GUSBCFG_IC_USB_CAP; in dwc_otg_core_init()
484 setbits_le32(®s->gusbcfg, usbcfg); in dwc_otg_core_init()