Lines Matching refs:udc_regs_p
36 static struct udc_regs *const udc_regs_p = variable
192 if (readl(&udc_regs_p->dev_stat) & DEV_STAT_RXFIFO_EMPTY) in usbgetpckfromfifo()
560 writel(~0x0, &udc_regs_p->endp_int); in udc_init()
561 writel(~0x0, &udc_regs_p->dev_int_mask); in udc_init()
562 writel(~0x0, &udc_regs_p->endp_int_mask); in udc_init()
566 DEV_CONF_PHYINT_16, &udc_regs_p->dev_conf); in udc_init()
569 DEV_CONF_PHYINT_16, &udc_regs_p->dev_conf); in udc_init()
572 writel(DEV_CNTL_SOFTDISCONNECT, &udc_regs_p->dev_cntl); in udc_init()
575 writel(DEV_INT_MSK, &udc_regs_p->dev_int); in udc_init()
582 return (readl(&udc_regs_p->dev_stat) & DEV_STAT_ENUM) ? 0 : 1; in is_usbd_high_speed()
676 &udc_regs_p->udc_endp_reg[ep_num]); in udc_setup_ep()
682 &udc_regs_p->udc_endp_reg[ep_num]); in udc_setup_ep()
689 &udc_regs_p->udc_endp_reg[ep_num]); in udc_setup_ep()
703 &udc_regs_p->udc_endp_reg[ep_num]); in udc_setup_ep()
708 &udc_regs_p->udc_endp_reg[ep_num]); in udc_setup_ep()
713 endp_intmask = readl(&udc_regs_p->endp_int_mask); in udc_setup_ep()
715 writel(endp_intmask, &udc_regs_p->endp_int_mask); in udc_setup_ep()
723 dev_cntl = readl(&udc_regs_p->dev_cntl); in udc_connect()
725 writel(dev_cntl, &udc_regs_p->dev_cntl); in udc_connect()
729 dev_cntl = readl(&udc_regs_p->dev_cntl); in udc_connect()
731 writel(dev_cntl, &udc_regs_p->dev_cntl); in udc_connect()
743 writel(DEV_CNTL_SOFTDISCONNECT, &udc_regs_p->dev_cntl); in udc_disconnect()
767 writel(DEV_INT_SOF, &udc_regs_p->dev_int_mask); in udc_enable()
809 writel(DEV_INT_SOF, &udc_regs_p->dev_int_mask); in dw_udc_plug_irq()
814 writel(~0x0, &udc_regs_p->dev_int_mask); in dw_udc_plug_irq()
826 if (readl(&udc_regs_p->dev_int) & DEV_INT_USBRESET) { in dw_udc_dev_irq()
827 writel(~0x0, &udc_regs_p->endp_int_mask); in dw_udc_dev_irq()
832 writel(DEV_INT_USBRESET, &udc_regs_p->dev_int); in dw_udc_dev_irq()
839 &udc_regs_p->udc_endp_reg[0]); in dw_udc_dev_irq()
846 if (readl(&udc_regs_p->dev_int) & DEV_INT_ENUM) { in dw_udc_dev_irq()
847 writel(DEV_INT_ENUM, &udc_regs_p->dev_int); in dw_udc_dev_irq()
850 writel(readl(&udc_regs_p->endp_int_mask) & ~0x10001, in dw_udc_dev_irq()
851 &udc_regs_p->endp_int_mask); in dw_udc_dev_irq()
858 if (readl(&udc_regs_p->dev_int) & DEV_INT_INACTIVE) { in dw_udc_dev_irq()
859 writel(DEV_INT_INACTIVE, &udc_regs_p->dev_int); in dw_udc_dev_irq()
866 if (readl(&udc_regs_p->dev_int) & DEV_INT_SETCFG) { in dw_udc_dev_irq()
867 writel(DEV_INT_SETCFG, &udc_regs_p->dev_int); in dw_udc_dev_irq()
875 if (readl(&udc_regs_p->dev_int) & DEV_INT_SETINTF) in dw_udc_dev_irq()
876 writel(DEV_INT_SETINTF, &udc_regs_p->dev_int); in dw_udc_dev_irq()
879 if (readl(&udc_regs_p->dev_int) & DEV_INT_SUSPUSB) { in dw_udc_dev_irq()
880 writel(DEV_INT_SUSPUSB, &udc_regs_p->dev_int); in dw_udc_dev_irq()
887 if (readl(&udc_regs_p->dev_int) & DEV_INT_SOF) in dw_udc_dev_irq()
888 writel(DEV_INT_SOF, &udc_regs_p->dev_int); in dw_udc_dev_irq()
896 while (readl(&udc_regs_p->endp_int) & ENDP0_INT_CTRLOUT) { in dw_udc_endpoint_irq()
898 writel(ENDP0_INT_CTRLOUT, &udc_regs_p->endp_int); in dw_udc_endpoint_irq()
920 if (readl(&udc_regs_p->endp_int) & ENDP0_INT_CTRLIN) { in dw_udc_endpoint_irq()
924 writel(ENDP0_INT_CTRLIN, &udc_regs_p->endp_int); in dw_udc_endpoint_irq()
927 if (readl(&udc_regs_p->endp_int) & ENDP_INT_NONISOOUT_MSK) { in dw_udc_endpoint_irq()
929 u32 ep_int = readl(&udc_regs_p->endp_int) & in dw_udc_endpoint_irq()
938 writel((1 << 16) << epnum, &udc_regs_p->endp_int); in dw_udc_endpoint_irq()
952 if (readl(&udc_regs_p->endp_int) & ENDP_INT_NONISOIN_MSK) { in dw_udc_endpoint_irq()
954 u32 ep_int = readl(&udc_regs_p->endp_int) & in dw_udc_endpoint_irq()
971 writel((1 << epnum), &udc_regs_p->endp_int); in dw_udc_endpoint_irq()
989 while (readl(&udc_regs_p->dev_int)) in udc_irq()
992 if (readl(&udc_regs_p->endp_int)) in udc_irq()