128 	for (int i = 0; i < 2; i++) {  in ufs_rockchip_rk3576_phy_init()  local
130 		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xaa, SEL_TX_LANE0 + i), 0x06);  in ufs_rockchip_rk3576_phy_init()
131 		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xa9, SEL_TX_LANE0 + i), 0x02);  in ufs_rockchip_rk3576_phy_init()
132 		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xad, SEL_TX_LANE0 + i), 0x44);  in ufs_rockchip_rk3576_phy_init()
133 		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xac, SEL_TX_LANE0 + i), 0xe6);  in ufs_rockchip_rk3576_phy_init()
134 		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0xab, SEL_TX_LANE0 + i), 0x07);  in ufs_rockchip_rk3576_phy_init()
135 		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x94, SEL_TX_LANE0 + i), 0x93);  in ufs_rockchip_rk3576_phy_init()
136 		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x93, SEL_TX_LANE0 + i), 0xc9);  in ufs_rockchip_rk3576_phy_init()
137 		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x7f, SEL_TX_LANE0 + i), 0x00);  in ufs_rockchip_rk3576_phy_init()
139 		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x12, SEL_RX_LANE0 + i), 0x06);  in ufs_rockchip_rk3576_phy_init()
140 		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x11, SEL_RX_LANE0 + i), 0x00);  in ufs_rockchip_rk3576_phy_init()
141 		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x1d, SEL_RX_LANE0 + i), 0x58);  in ufs_rockchip_rk3576_phy_init()
142 		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x1c, SEL_RX_LANE0 + i), 0x8c);  in ufs_rockchip_rk3576_phy_init()
143 		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x1b, SEL_RX_LANE0 + i), 0x02);  in ufs_rockchip_rk3576_phy_init()
144 		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x25, SEL_RX_LANE0 + i), 0xf6);  in ufs_rockchip_rk3576_phy_init()
145 		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x2f, SEL_RX_LANE0 + i), 0x69);  in ufs_rockchip_rk3576_phy_init()
146 		ufshcd_dme_set(hba, UIC_ARG_MIB_SEL(0x1e, SEL_RX_LANE0 + i), 0x18);  in ufs_rockchip_rk3576_phy_init()