65 	u32 command;	/* SLINK_COMMAND_0 register  */  member
156 	reg = readl(&regs->command);  in tegra30_spi_claim_bus()
158 	writel(reg, &regs->command);  in tegra30_spi_claim_bus()
159 	debug("%s: COMMAND = %08x\n", __func__, readl(&regs->command));  in tegra30_spi_claim_bus()
180 	setbits_le32(&priv->regs->command, SLINK_CMD_CS_VAL);  in spi_cs_activate()
190 	clrbits_le32(&priv->regs->command, SLINK_CMD_CS_VAL);  in spi_cs_deactivate()
226 	debug("%s entry: COMMAND = %08x\n", __func__, readl(&regs->command));  in tegra30_spi_xfer()
253 		clrsetbits_le32(&regs->command, SLINK_CMD_BIT_LENGTH_MASK,  in tegra30_spi_xfer()
256 		setbits_le32(&regs->command, SLINK_CMD_GO);  in tegra30_spi_xfer()
331 	reg = readl(&regs->command);  in tegra30_spi_set_mode()
343 	writel(reg, &regs->command);  in tegra30_spi_set_mode()