104 	struct fsl_dspi_priv priv;  member
133 static void dspi_halt(struct fsl_dspi_priv *priv, u8 halt)  in dspi_halt()  argument
137 	mcr_val = dspi_read32(priv->flags, &priv->regs->mcr);  in dspi_halt()
144 	dspi_write32(priv->flags, &priv->regs->mcr, mcr_val);  in dspi_halt()
147 static void fsl_dspi_init_mcr(struct fsl_dspi_priv *priv, uint cfg_val)  in fsl_dspi_init_mcr()  argument
150 	dspi_halt(priv, 1);  in fsl_dspi_init_mcr()
152 	dspi_write32(priv->flags, &priv->regs->mcr, cfg_val);  in fsl_dspi_init_mcr()
155 	dspi_halt(priv, 0);  in fsl_dspi_init_mcr()
157 	priv->mcr_val = cfg_val;  in fsl_dspi_init_mcr()
160 static void fsl_dspi_cfg_cs_active_state(struct fsl_dspi_priv *priv,  in fsl_dspi_cfg_cs_active_state()  argument
165 	dspi_halt(priv, 1);  in fsl_dspi_cfg_cs_active_state()
167 	mcr_val = dspi_read32(priv->flags, &priv->regs->mcr);  in fsl_dspi_cfg_cs_active_state()
174 	dspi_write32(priv->flags, &priv->regs->mcr, mcr_val);  in fsl_dspi_cfg_cs_active_state()
176 	dspi_halt(priv, 0);  in fsl_dspi_cfg_cs_active_state()
179 static int fsl_dspi_cfg_ctar_mode(struct fsl_dspi_priv *priv,  in fsl_dspi_cfg_ctar_mode()  argument
184 	bus_setup = dspi_read32(priv->flags, &priv->regs->ctar[0]);  in fsl_dspi_cfg_ctar_mode()
187 	bus_setup |= priv->ctar_val[cs];  in fsl_dspi_cfg_ctar_mode()
197 	dspi_write32(priv->flags, &priv->regs->ctar[0], bus_setup);  in fsl_dspi_cfg_ctar_mode()
199 	priv->charbit =  in fsl_dspi_cfg_ctar_mode()
200 		((dspi_read32(priv->flags, &priv->regs->ctar[0]) &  in fsl_dspi_cfg_ctar_mode()
206 static void fsl_dspi_clr_fifo(struct fsl_dspi_priv *priv)  in fsl_dspi_clr_fifo()  argument
210 	dspi_halt(priv, 1);  in fsl_dspi_clr_fifo()
211 	mcr_val = dspi_read32(priv->flags, &priv->regs->mcr);  in fsl_dspi_clr_fifo()
214 	dspi_write32(priv->flags, &priv->regs->mcr, mcr_val);  in fsl_dspi_clr_fifo()
215 	dspi_halt(priv, 0);  in fsl_dspi_clr_fifo()
218 static void dspi_tx(struct fsl_dspi_priv *priv, u32 ctrl, u16 data)  in dspi_tx()  argument
223 	while (DSPI_SR_TXCTR(dspi_read32(priv->flags, &priv->regs->sr)) >= 4 &&  in dspi_tx()
228 		dspi_write32(priv->flags, &priv->regs->tfr, (ctrl | data));  in dspi_tx()
233 static u16 dspi_rx(struct fsl_dspi_priv *priv)  in dspi_rx()  argument
238 	while (DSPI_SR_RXCTR(dspi_read32(priv->flags, &priv->regs->sr)) == 0 &&  in dspi_rx()
244 				dspi_read32(priv->flags, &priv->regs->rfr));  in dspi_rx()
251 static int dspi_xfer(struct fsl_dspi_priv *priv, uint cs, unsigned int bitlen,  in dspi_xfer()  argument
259 	if (priv->charbit == 16) {  in dspi_xfer()
278 				if (priv->charbit == 16)  in dspi_xfer()
279 					dspi_tx(priv, ctrl, *spi_wr16++);  in dspi_xfer()
281 					dspi_tx(priv, ctrl, *spi_wr++);  in dspi_xfer()
282 				dspi_rx(priv);  in dspi_xfer()
286 				dspi_tx(priv, ctrl, DSPI_IDLE_VAL);  in dspi_xfer()
287 				if (priv->charbit == 16)  in dspi_xfer()
288 					*spi_rd16++ = dspi_rx(priv);  in dspi_xfer()
290 					*spi_rd++ = dspi_rx(priv);  in dspi_xfer()
302 			if (priv->charbit == 16)  in dspi_xfer()
303 				dspi_tx(priv, ctrl, *spi_wr16);  in dspi_xfer()
305 				dspi_tx(priv, ctrl, *spi_wr);  in dspi_xfer()
306 			dspi_rx(priv);  in dspi_xfer()
310 			dspi_tx(priv, ctrl, DSPI_IDLE_VAL);  in dspi_xfer()
311 			if (priv->charbit == 16)  in dspi_xfer()
312 				*spi_rd16 = dspi_rx(priv);  in dspi_xfer()
314 				*spi_rd = dspi_rx(priv);  in dspi_xfer()
318 		dspi_tx(priv, ctrl, DSPI_IDLE_VAL);  in dspi_xfer()
319 		dspi_rx(priv);  in dspi_xfer()
365 static int fsl_dspi_cfg_speed(struct fsl_dspi_priv *priv, uint speed)  in fsl_dspi_cfg_speed()  argument
371 	bus_clk = priv->bus_clk;  in fsl_dspi_cfg_speed()
376 	bus_setup = dspi_read32(priv->flags, &priv->regs->ctar[0]);  in fsl_dspi_cfg_speed()
381 		speed = priv->speed_hz;  in fsl_dspi_cfg_speed()
387 	dspi_write32(priv->flags, &priv->regs->ctar[0], bus_setup);  in fsl_dspi_cfg_speed()
389 	priv->speed_hz = speed;  in fsl_dspi_cfg_speed()
420 	dspi->priv.flags |= DSPI_FLAG_REGMAP_ENDIAN_BIG;  in spi_setup_slave()
423 	dspi->priv.regs = (struct dspi *)MMAP_DSPI;  in spi_setup_slave()
426 	dspi->priv.bus_clk = gd->bus_clk;  in spi_setup_slave()
428 	dspi->priv.bus_clk = mxc_get_clock(MXC_DSPI_CLK);  in spi_setup_slave()
430 	dspi->priv.speed_hz = FSL_DSPI_DEFAULT_SCK_FREQ;  in spi_setup_slave()
435 	fsl_dspi_init_mcr(&dspi->priv, mcr_cfg_val);  in spi_setup_slave()
438 		dspi->priv.ctar_val[i] = DSPI_CTAR_DEFAULT_VALUE;  in spi_setup_slave()
442 		dspi->priv.ctar_val[0] = CONFIG_SYS_DSPI_CTAR0;  in spi_setup_slave()
446 		dspi->priv.ctar_val[1] = CONFIG_SYS_DSPI_CTAR1;  in spi_setup_slave()
450 		dspi->priv.ctar_val[2] = CONFIG_SYS_DSPI_CTAR2;  in spi_setup_slave()
454 		dspi->priv.ctar_val[3] = CONFIG_SYS_DSPI_CTAR3;  in spi_setup_slave()
458 		dspi->priv.ctar_val[4] = CONFIG_SYS_DSPI_CTAR4;  in spi_setup_slave()
462 		dspi->priv.ctar_val[5] = CONFIG_SYS_DSPI_CTAR5;  in spi_setup_slave()
466 		dspi->priv.ctar_val[6] = CONFIG_SYS_DSPI_CTAR6;  in spi_setup_slave()
470 		dspi->priv.ctar_val[7] = CONFIG_SYS_DSPI_CTAR7;  in spi_setup_slave()
473 	fsl_dspi_cfg_speed(&dspi->priv, max_hz);  in spi_setup_slave()
476 	fsl_dspi_cfg_ctar_mode(&dspi->priv, cs, mode);  in spi_setup_slave()
479 	fsl_dspi_cfg_cs_active_state(&dspi->priv, cs, mode);  in spi_setup_slave()
496 	fsl_dspi_clr_fifo(&dspi->priv);  in spi_claim_bus()
499 	sr_val = dspi_read32(dspi->priv.flags, &dspi->priv.regs->sr);  in spi_claim_bus()
512 	dspi_halt(&dspi->priv, 1);  in spi_release_bus()
520 	return dspi_xfer(&dspi->priv, slave->cs, bitlen, dout, din, flags);  in spi_xfer()
526 	struct fsl_dspi_priv *priv = dev_get_priv(dev->parent);  in fsl_dspi_child_pre_probe()  local
528 	if (slave_plat->cs >= priv->num_chipselect) {  in fsl_dspi_child_pre_probe()
530 		      slave_plat->cs, priv->num_chipselect - 1);  in fsl_dspi_child_pre_probe()
534 	priv->ctar_val[slave_plat->cs] = DSPI_CTAR_DEFAULT_VALUE;  in fsl_dspi_child_pre_probe()
545 	struct fsl_dspi_priv *priv = dev_get_priv(bus);  in fsl_dspi_probe()  local
555 	priv->regs = (struct dspi *)plat->regs_addr;  in fsl_dspi_probe()
556 	priv->flags = plat->flags;  in fsl_dspi_probe()
558 	priv->bus_clk = gd->bus_clk;  in fsl_dspi_probe()
560 	priv->bus_clk = mxc_get_clock(MXC_DSPI_CLK);  in fsl_dspi_probe()
562 	priv->num_chipselect = plat->num_chipselect;  in fsl_dspi_probe()
563 	priv->speed_hz = plat->speed_hz;  in fsl_dspi_probe()
565 	priv->charbit = 8;  in fsl_dspi_probe()
572 	fsl_dspi_init_mcr(priv, mcr_cfg_val);  in fsl_dspi_probe()
582 	struct fsl_dspi_priv *priv;  in fsl_dspi_claim_bus()  local
587 	priv = dev_get_priv(bus);  in fsl_dspi_claim_bus()
593 	fsl_dspi_cfg_ctar_mode(priv, slave_plat->cs, priv->mode);  in fsl_dspi_claim_bus()
596 	fsl_dspi_cfg_cs_active_state(priv, slave_plat->cs,  in fsl_dspi_claim_bus()
597 				     priv->mode);  in fsl_dspi_claim_bus()
599 	fsl_dspi_clr_fifo(priv);  in fsl_dspi_claim_bus()
602 	sr_val = dspi_read32(priv->flags, &priv->regs->sr);  in fsl_dspi_claim_bus()
614 	struct fsl_dspi_priv *priv = dev_get_priv(bus);  in fsl_dspi_release_bus()  local
619 	dspi_halt(priv, 1);  in fsl_dspi_release_bus()
670 	struct fsl_dspi_priv *priv;  in fsl_dspi_xfer()  local
675 	priv = dev_get_priv(bus);  in fsl_dspi_xfer()
677 	return dspi_xfer(priv, slave_plat->cs, bitlen, dout, din, flags);  in fsl_dspi_xfer()
682 	struct fsl_dspi_priv *priv = dev_get_priv(bus);  in fsl_dspi_set_speed()  local
684 	return fsl_dspi_cfg_speed(priv, speed);  in fsl_dspi_set_speed()
689 	struct fsl_dspi_priv *priv = dev_get_priv(bus);  in fsl_dspi_set_mode()  local
699 	priv->mode = mode;  in fsl_dspi_set_mode()