13 	void __iomem *base;  member
37 	void __iomem *base = plat->base;  in mvebu_serial_putc()  local
39 	while (readl(base + UART_STATUS_REG) & UART_STATUS_TXFIFO_FULL)  in mvebu_serial_putc()
42 	writel(ch, base + UART_TX_REG);  in mvebu_serial_putc()
50 	void __iomem *base = plat->base;  in mvebu_serial_getc()  local
52 	while (!(readl(base + UART_STATUS_REG) & UART_STATUS_RX_RDY))  in mvebu_serial_getc()
55 	return readl(base + UART_RX_REG) & 0xff;  in mvebu_serial_getc()
61 	void __iomem *base = plat->base;  in mvebu_serial_pending()  local
63 	if (readl(base + UART_STATUS_REG) & UART_STATUS_RX_RDY)  in mvebu_serial_pending()
72 	void __iomem *base = plat->base;  in mvebu_serial_setbrg()  local
78 	writel(CONFIG_UART_BASE_CLOCK / baudrate / 16, base + UART_BAUD_REG);  in mvebu_serial_setbrg()
84 	writel(0, base + UART_POSSR_REG);  in mvebu_serial_setbrg()
92 	void __iomem *base = plat->base;  in mvebu_serial_probe()  local
96 	       base + UART_CTRL_REG);  in mvebu_serial_probe()
99 	writel(0, base + UART_CTRL_REG);  in mvebu_serial_probe()
108 	plat->base = devfdt_get_addr_ptr(dev);  in mvebu_serial_ofdata_to_platdata()
142 	void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;  in _debug_uart_init()  local
146 	       base + UART_CTRL_REG);  in _debug_uart_init()
149 	writel(0, base + UART_CTRL_REG);  in _debug_uart_init()
155 	writel(CONFIG_UART_BASE_CLOCK / 115200 / 16, base + UART_BAUD_REG);  in _debug_uart_init()
161 	writel(0, base + UART_POSSR_REG);  in _debug_uart_init()
166 	void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE;  in _debug_uart_putc()  local
168 	while (readl(base + UART_STATUS_REG) & UART_STATUS_TXFIFO_FULL)  in _debug_uart_putc()
171 	writel(ch, base + UART_TX_REG);  in _debug_uart_putc()