Lines Matching refs:base
86 void __iomem *base; member
91 static void bcm6345_serial_enable(void __iomem *base) in bcm6345_serial_enable() argument
93 setbits_be32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK | in bcm6345_serial_enable()
98 static void bcm6345_serial_disable(void __iomem *base) in bcm6345_serial_disable() argument
100 clrbits_be32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK | in bcm6345_serial_disable()
105 static void bcm6345_serial_flush(void __iomem *base) in bcm6345_serial_flush() argument
108 setbits_be32(base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK | in bcm6345_serial_flush()
112 readl_be(base + UART_FIFO_REG); in bcm6345_serial_flush()
115 static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate) in bcm6345_serial_init() argument
120 bcm6345_serial_disable(base); in bcm6345_serial_init()
121 bcm6345_serial_flush(base); in bcm6345_serial_init()
124 clrsetbits_be32(base + UART_CTL_REG, in bcm6345_serial_init()
151 clrsetbits_be32(base + UART_FIFO_CFG_REG, in bcm6345_serial_init()
165 writel_be(val, base + UART_BAUD_REG); in bcm6345_serial_init()
168 writel_be(0, base + UART_IR_REG); in bcm6345_serial_init()
171 bcm6345_serial_enable(base); in bcm6345_serial_init()
179 u32 val = readl_be(priv->base + UART_IR_REG); in bcm6345_serial_pending()
191 return bcm6345_serial_init(priv->base, priv->uartclk, baudrate); in bcm6345_serial_setbrg()
199 val = readl_be(priv->base + UART_IR_REG); in bcm6345_serial_putc()
203 writel_be(ch, priv->base + UART_FIFO_REG); in bcm6345_serial_putc()
213 val = readl_be(priv->base + UART_IR_REG); in bcm6345_serial_getc()
215 setbits_be32(priv->base + UART_CTL_REG, in bcm6345_serial_getc()
220 val = readl_be(priv->base + UART_FIFO_REG); in bcm6345_serial_getc()
240 priv->base = ioremap(addr, size); in bcm6345_serial_probe()
250 return bcm6345_serial_init(priv->base, priv->uartclk, CONFIG_BAUDRATE); in bcm6345_serial_probe()
278 void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE; in _debug_uart_init() local
280 bcm6345_serial_init(base, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE); in _debug_uart_init()
283 static inline void wait_xfered(void __iomem *base) in wait_xfered() argument
286 u32 val = readl_be(base + UART_IR_REG); in wait_xfered()
294 void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE; in _debug_uart_putc() local
296 wait_xfered(base); in _debug_uart_putc()
297 writel_be(ch, base + UART_FIFO_REG); in _debug_uart_putc()
298 wait_xfered(base); in _debug_uart_putc()