Lines Matching refs:pctl_write_mr
1606 pctl_write_mr(pctl_base, BIT(cs), 4, mr4_d4 | BIT(11), DDR4); in data_training_rg()
1623 pctl_write_mr(pctl_base, BIT(cs), 4, mr4_d4, DDR4); in data_training_rg()
1660 pctl_write_mr(dram->pctl, (cs + 1) & 1, 1, tmp | (1 << 12), in data_training_wl()
1694 pctl_write_mr(dram->pctl, (cs + 1) & 1, 1, tmp & ~(1 << 12), in data_training_wl()
1845 pctl_write_mr(dram->pctl, 3, 2, 0x6, dramtype); in data_training_wr()
1932 pctl_write_mr(dram->pctl, 3, 2, mr_tmp & PCTL2_MR_MASK, in data_training_wr()
2631 pctl_write_mr(dram->pctl, 3, 11, lp3_odt_value, LPDDR3); in sdram_init_()
2636 pctl_write_mr(dram->pctl, 3, 11, in sdram_init_()
2640 pctl_write_mr(dram->pctl, 3, 12, in sdram_init_()
2646 pctl_write_mr(dram->pctl, 3, 22, in sdram_init_()
2651 pctl_write_mr(dram->pctl, 0x3, 6, mr_tmp | BIT(7), DDR4); in sdram_init_()
2652 pctl_write_mr(dram->pctl, 0x3, 6, mr_tmp | BIT(7), DDR4); in sdram_init_()
2653 pctl_write_mr(dram->pctl, 0x3, 6, mr_tmp, DDR4); in sdram_init_()
2685 pctl_write_mr(dram->pctl, 3, 14, in sdram_init_()
3073 pctl_write_mr(dram->pctl, 3, 13, in pre_set_rate()
3082 pctl_write_mr(dram->pctl, 3, 3, in pre_set_rate()
3092 pctl_write_mr(dram->pctl, 3, 1, in pre_set_rate()
3099 pctl_write_mr(dram->pctl, 3, 2, mr_tmp & PCTL2_MR_MASK, in pre_set_rate()
3107 pctl_write_mr(dram->pctl, 3, 11, in pre_set_rate()
3113 pctl_write_mr(dram->pctl, 3, 12, in pre_set_rate()
3120 pctl_write_mr(dram->pctl, 3, 22, in pre_set_rate()
3126 pctl_write_mr(dram->pctl, 3, 14, in pre_set_rate()
3429 pctl_write_mr(dram->pctl, 2, 1, cur_init3, dramtype); in ddr_set_rate()
3504 pctl_write_mr(dram->pctl, 3, 1, in ddr_set_rate()
3508 pctl_write_mr(dram->pctl, 3, 2, dst_init3 & PCTL2_MR_MASK, in ddr_set_rate()
3510 pctl_write_mr(dram->pctl, 3, 3, in ddr_set_rate()
3514 pctl_write_mr(dram->pctl, 3, 11, lp3_odt_value, dramtype); in ddr_set_rate()
3516 pctl_write_mr(dram->pctl, 3, 1, dst_init3 & PCTL2_MR_MASK, in ddr_set_rate()
3519 pctl_write_mr(dram->pctl, 3, 0, in ddr_set_rate()
3525 pctl_write_mr(dram->pctl, 3, 0, in ddr_set_rate()
3529 pctl_write_mr(dram->pctl, 3, 2, in ddr_set_rate()
3533 pctl_write_mr(dram->pctl, 3, 3, mr_tmp & PCTL2_MR_MASK, in ddr_set_rate()
3537 pctl_write_mr(dram->pctl, 3, 4, in ddr_set_rate()
3541 pctl_write_mr(dram->pctl, 3, 5, in ddr_set_rate()
3549 pctl_write_mr(dram->pctl, 3, 6, in ddr_set_rate()
3552 pctl_write_mr(dram->pctl, 3, 6, in ddr_set_rate()
3555 pctl_write_mr(dram->pctl, 3, 6, in ddr_set_rate()
3561 pctl_write_mr(dram->pctl, 3, 13, in ddr_set_rate()