871 	clrsetbits_le32(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +  in set_lp4_vref()
876 	clrsetbits_le32(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +  in set_lp4_vref()
1093 		mr1_mr3 = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +  in set_ds_odt()
1097 		mr1_mr3 = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +  in set_ds_odt()
1165 		mr11 = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +  in set_ds_odt()
1177 		clrsetbits_le32(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +  in set_ds_odt()
1184 		mr22 = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +  in set_ds_odt()
1200 		clrsetbits_le32(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +  in set_ds_odt()
1209 		clrsetbits_le32(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +  in set_ds_odt()
1216 		clrsetbits_le32(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +  in set_ds_odt()
1654 	tmp = readl(pctl_base + UMCTL2_REGS_FREQ(cur_fsp) + DDR_PCTL2_INIT3) &  in data_training_wl()
1747 	trefi_1x = ((readl(pctl_base + UMCTL2_REGS_FREQ(cur_fsp) +  in data_training_rd()
1749 	trfc_1x = readl(pctl_base + UMCTL2_REGS_FREQ(cur_fsp) +  in data_training_rd()
1866 	trefi_1x = ((readl(pctl_base + UMCTL2_REGS_FREQ(cur_fsp) +  in data_training_wr()
1868 	trfc_1x = readl(pctl_base + UMCTL2_REGS_FREQ(cur_fsp) +  in data_training_wr()
1930 		mr_tmp = readl(pctl_base + UMCTL2_REGS_FREQ(cur_fsp) +  in data_training_wr()
3029 				       pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +  in pre_set_rate()
3040 	tmp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) + DDR_PCTL2_RFSHTMG);  in pre_set_rate()
3043 	       pctl_base + UMCTL2_REGS_FREQ(dst_fsp) + DDR_PCTL2_RFSHTMG);  in pre_set_rate()
3070 		mr_tmp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +  in pre_set_rate()
3089 		mr_tmp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +  in pre_set_rate()
3104 		mr_tmp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +  in pre_set_rate()
3117 		mr_tmp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +  in pre_set_rate()
3173 		temp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +  in save_fsp_param()
3180 		temp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +  in save_fsp_param()
3187 		temp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +  in save_fsp_param()
3196 		temp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +  in save_fsp_param()
3201 		temp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +  in save_fsp_param()
3409 	dst_init3 = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +  in ddr_set_rate()
3416 	cur_init3 = readl(pctl_base + UMCTL2_REGS_FREQ(cur_fsp) +  in ddr_set_rate()
3452 	setbits_le32(pctl_base + UMCTL2_REGS_FREQ(cur_fsp) + DDR_PCTL2_ZQCTL0,  in ddr_set_rate()
3454 	setbits_le32(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) + DDR_PCTL2_ZQCTL0,  in ddr_set_rate()
3502 	mr_tmp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) + DDR_PCTL2_INIT4);  in ddr_set_rate()
3535 			mr_tmp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +  in ddr_set_rate()
3546 			mr_tmp = readl(pctl_base + UMCTL2_REGS_FREQ(dst_fsp) +  in ddr_set_rate()