805 	else if (dramtype == LPDDR4X)  in get_ddr_drv_odt_info()
954 	if (dramtype == LPDDR4 || dramtype == LPDDR4X) {  in set_ds_odt()
969 	} else if (dramtype == LPDDR4 || dramtype == LPDDR4X) {  in set_ds_odt()
1013 	if (dramtype != LPDDR4 && dramtype != LPDDR4X) {  in set_ds_odt()
1047 	if (dramtype == LPDDR4 || dramtype == LPDDR4X) {  in set_ds_odt()
1073 		if (dramtype == LPDDR4 || dramtype == LPDDR4X)  in set_ds_odt()
1089 	if (dramtype == LPDDR4 || dramtype == LPDDR4X)  in set_ds_odt()
1236 	if (dramtype == LPDDR4X)  in sdram_cmd_dq_path_remap()
1290 	    sdram_params->base.dramtype == LPDDR4X)  in phy_cfg()
1325 	if (dramtype != LPDDR4 && dramtype != LPDDR4X) {  in read_mr()
1444 	if ((dramtype == LPDDR4 || dramtype == LPDDR4X) &&  in modify_ca_deskew()
1467 	if (dramtype == LPDDR4 || dramtype == LPDDR4X) {  in modify_ca_deskew()
1587 	if (dramtype != LPDDR4 || dramtype != LPDDR4X) {  in data_training_rg()
1629 	if (dramtype != LPDDR4 || dramtype != LPDDR4X) {  in data_training_rg()
1918 	if (dramtype == LPDDR4 || dramtype == LPDDR4X) {  in data_training_wr()
2124 	if (dramtype == LPDDR4 || dramtype == LPDDR4X) {  in high_freq_training()
2242 	    sdram_params->base.dramtype == LPDDR4X) {  in update_noc_timing()
2497 	if (dramtype != LPDDR4 && dramtype != LPDDR4X)  in check_lp4_rzqi()
2633 		   sdram_params->base.dramtype == LPDDR4X) {  in sdram_init_()
2682 	    sdram_params->base.dramtype == LPDDR4X) {  in sdram_init_()
2727 	if (dram_type != LPDDR4 && dram_type != LPDDR4X) {  in dram_detect_cap()
3069 	if (dramtype == LPDDR4 || dramtype == LPDDR4X) {  in pre_set_rate()
3150 	    sdram_params->base.dramtype == LPDDR4X) {  in save_fsp_param()
3195 		   sdram_params->base.dramtype == LPDDR4X) {  in save_fsp_param()
3316 	case LPDDR4X:  in pctl_modify_trfc()
3365 			    dram_type == LPDDR4 || dram_type == LPDDR4X) {  in pctl_modify_trfc()
3560 	} else if (dramtype == LPDDR4 || dramtype == LPDDR4X) {  in ddr_set_rate()
3695 		sdram_configs[j].base.dramtype = LPDDR4X;  in sdram_init()