555 	if (sdram_params->base.dramtype == LPDDR3 && cap_info->row_3_4)  in set_ctl_address_map()
801 	else if (dramtype == LPDDR3)  in get_ddr_drv_odt_info()
1086 	if (dramtype == LPDDR3)  in set_ds_odt()
1134 	} else if (dramtype == LPDDR3) {  in set_ds_odt()
1837 	if (dramtype == LPDDR3 && mhz <= 400) {  in data_training_wr()
1927 	if (dramtype == LPDDR3 && mhz <= 400) {  in data_training_wr()
2139 	} else if (dramtype == LPDDR3) {  in high_freq_training()
2630 	if (sdram_params->base.dramtype == LPDDR3) {  in sdram_init_()
2631 		pctl_write_mr(dram->pctl, 3, 11, lp3_odt_value, LPDDR3);  in sdram_init_()
2743 			if (dram_type != LPDDR3)  in dram_detect_cap()
2827 	if (dram_type == LPDDR3)  in dram_detect_cap()
3186 	} else if (sdram_params->base.dramtype == LPDDR3) {  in save_fsp_param()
3307 	case LPDDR3:  in pctl_modify_trfc()
3364 			if (dram_type == LPDDR3 ||  in pctl_modify_trfc()
3503 	if (dramtype == LPDDR3) {  in ddr_set_rate()