415 	if (sdram_params->base.dramtype == DDR4) {  in calculate_ddrconfig()
486 	if (sdram_params->base.dramtype == DDR4) {  in calculate_ddrconfig()
532 	if (sdram_params->base.dramtype == DDR4) {  in set_ctl_address_map()
557 	if (sdram_params->base.dramtype == DDR4 && cap_info->bw == 0x1)  in set_ctl_address_map()
797 	if (dramtype == DDR4)  in get_ddr_drv_odt_info()
1092 	if (dramtype == DDR3 || dramtype == DDR4) {  in set_ds_odt()
1116 	} else if (dramtype == DDR4) {  in set_ds_odt()
1207 	if (dramtype == DDR4 || dramtype == DDR3) {  in set_ds_odt()
1600 	if (dramtype == DDR4) {  in data_training_rg()
1606 		pctl_write_mr(pctl_base, BIT(cs), 4, mr4_d4 | BIT(11), DDR4);  in data_training_rg()
1622 	if (dramtype == DDR4) {  in data_training_rg()
1623 		pctl_write_mr(pctl_base, BIT(cs), 4, mr4_d4, DDR4);  in data_training_rg()
1659 	if ((dramtype == DDR3 || dramtype == DDR4) && rank == 2)  in data_training_wl()
1662 	if (dramtype == DDR3 || dramtype == DDR4)  in data_training_wl()
1693 	if ((dramtype == DDR3 || dramtype == DDR4) && rank == 2)  in data_training_wl()
1763 	if (dramtype == DDR4) {  in data_training_rd()
2368 	if (sdram_params->base.dramtype == DDR4)  in enable_low_power()
2532 	else if (dramtype == DDR4)  in modify_ddr34_bw_byte_map()
2649 	} else if (sdram_params->base.dramtype == DDR4) {  in sdram_init_()
2651 		pctl_write_mr(dram->pctl, 0x3, 6, mr_tmp | BIT(7), DDR4);  in sdram_init_()
2652 		pctl_write_mr(dram->pctl, 0x3, 6, mr_tmp | BIT(7), DDR4);  in sdram_init_()
2653 		pctl_write_mr(dram->pctl, 0x3, 6, mr_tmp, DDR4);  in sdram_init_()
2697 	if (sdram_params->base.dramtype == DDR4) {  in sdram_init_()
2728 		if (dram_type != DDR4) {  in dram_detect_cap()
2858 		if (sdram_params->base.dramtype == DDR4) {  in dram_detect_cs1_row()
3179 	} else if (sdram_params->base.dramtype == DDR4) {  in save_fsp_param()
3289 	case DDR4:  in pctl_modify_trfc()
3344 			if (dram_type == DDR3 || dram_type == DDR4) {  in pctl_modify_trfc()
3350 				if (dram_type == DDR4) {  in pctl_modify_trfc()
3412 	    (dramtype == DDR4 && !(dst_init3 & 1)))  in ddr_set_rate()
3421 	    (dramtype == DDR4 && (cur_init3 & 1)))  in ddr_set_rate()
3447 	if ((dramtype == DDR3 || dramtype == DDR4) && dest_dll_off)  in ddr_set_rate()
3515 	} else if ((dramtype == DDR3) || (dramtype == DDR4)) {  in ddr_set_rate()
3532 		if (dramtype == DDR4) {  in ddr_set_rate()
3698 	    sdram_params->base.dramtype == DDR4) {  in sdram_init()