Lines Matching refs:params_priv
112 struct sdram_params *params_priv) in memory_init() argument
116 if (params_priv->ddr_config_t.ddr_type == DDR3 || in memory_init()
117 params_priv->ddr_config_t.ddr_type == DDR2) { in memory_init()
125 (params_priv->ddr_timing_t.phy_timing.mr[2] & in memory_init()
130 (params_priv->ddr_timing_t.phy_timing.mr[3] & in memory_init()
135 (params_priv->ddr_timing_t.phy_timing.mr[1] & in memory_init()
138 mr0 = params_priv->ddr_timing_t.phy_timing.mr[0]; in memory_init()
139 if (params_priv->ddr_config_t.ddr_type == DDR3) { in memory_init()
183 (params_priv->ddr_timing_t.phy_timing.mr[1] & in memory_init()
187 (params_priv->ddr_timing_t.phy_timing.mr[2] & in memory_init()
191 (params_priv->ddr_timing_t.phy_timing.mr[3] & in memory_init()
261 struct sdram_params *params_priv) in pctl_cfg() argument
286 ¶ms_priv->ddr_timing_t.pctl_timing.togcnt1u, in pctl_cfg()
292 burstlen = params_priv->ddr_timing_t.noc_timing.b.burstlen * 4; in pctl_cfg()
294 if (params_priv->ddr_config_t.ddr_type == DDR3 || in pctl_cfg()
295 params_priv->ddr_config_t.ddr_type == DDR2) { in pctl_cfg()
303 writel(params_priv->ddr_timing_t.pctl_timing.trsth, in pctl_cfg()
305 if (params_priv->ddr_config_t.ddr_type == DDR3) in pctl_cfg()
310 params_priv->ddr_2t_en << TWO_T_SHIFT, in pctl_cfg()
317 params_priv->ddr_2t_en << TWO_T_SHIFT, in pctl_cfg()
324 params_priv->ddr_2t_en << TWO_T_SHIFT, in pctl_cfg()
364 pctl_cfg_grf(priv, params_priv); in pctl_cfg()
372 struct sdram_params *params_priv) in phy_cfg() argument
376 burstlen = params_priv->ddr_timing_t.noc_timing.b.burstlen * 4; in phy_cfg()
378 ddr_msch_cfg(priv, params_priv); in phy_cfg()
380 switch (params_priv->ddr_config_t.ddr_type) { in phy_cfg()
393 writel(params_priv->ddr_timing_t.phy_timing.cl_al, in phy_cfg()
395 writel(params_priv->ddr_timing_t.pctl_timing.tcwl, in phy_cfg()
398 set_ds_odt(priv, params_priv); in phy_cfg()
406 struct sdram_params *params_priv) in dram_cfg_rbc() argument
409 ddr_msch_cfg_rbc(params_priv, priv); in dram_cfg_rbc()
450 struct sdram_params *params_priv) in sdram_detect() argument
478 params_priv->ddr_config_t.col = col; in sdram_detect()
480 if (params_priv->ddr_config_t.ddr_type == DDR3) { in sdram_detect()
481 params_priv->ddr_config_t.bank = 3; in sdram_detect()
490 params_priv->ddr_config_t.bank = 3; in sdram_detect()
492 params_priv->ddr_config_t.bank = 2; in sdram_detect()
515 params_priv->ddr_config_t.cs0_row = row; in sdram_detect()
524 struct sdram_params *params_priv) in sdram_all_config() argument
539 os_reg = (params_priv->ddr_config_t.ddr_type & SYS_REG_DDRTYPE_MASK) << in sdram_all_config()
545 ((params_priv->ddr_config_t.col - 9) & SYS_REG_COL_MASK) << in sdram_all_config()
547 ((params_priv->ddr_config_t.bank == 3 ? 0 : 1) & in sdram_all_config()
549 ((params_priv->ddr_config_t.cs0_row - 13) & in sdram_all_config()
559 if (params_priv->ddr_config_t.cs0_row == 12) in sdram_all_config()
568 printdec(params_priv->ddr_timing_t.freq); in sdram_all_config()
570 switch (params_priv->ddr_config_t.ddr_type & SYS_REG_DDRTYPE_MASK) { in sdram_all_config()
583 printdec(params_priv->ddr_config_t.col); in sdram_all_config()
585 printdec(params_priv->ddr_config_t.bank); in sdram_all_config()
587 printdec(params_priv->ddr_config_t.cs0_row); in sdram_all_config()
590 params_priv->ddr_config_t.col + in sdram_all_config()
591 params_priv->ddr_config_t.cs0_row + in sdram_all_config()
592 params_priv->ddr_config_t.bank); in sdram_all_config()
611 struct sdram_params *params_priv) in rv1108_sdram_init() argument
615 rkdclk_init(sdram_priv, params_priv); in rv1108_sdram_init()
617 phy_dll_bypass_set(sdram_priv, params_priv->ddr_timing_t.freq); in rv1108_sdram_init()
618 pctl_cfg(sdram_priv, params_priv); in rv1108_sdram_init()
619 phy_cfg(sdram_priv, params_priv); in rv1108_sdram_init()
624 memory_init(sdram_priv, params_priv); in rv1108_sdram_init()
629 if (sdram_detect(sdram_priv, params_priv)) { in rv1108_sdram_init()
637 modify_data_training(sdram_priv, params_priv); in rv1108_sdram_init()
639 dram_cfg_rbc(sdram_priv, params_priv); in rv1108_sdram_init()
640 sdram_all_config(sdram_priv, params_priv); in rv1108_sdram_init()
641 enable_low_power(sdram_priv, params_priv); in rv1108_sdram_init()