Lines Matching refs:f1_sdram_params

2503 			     struct rk3399_sdram_params *f1_sdram_params,  in dram_copy_phy_fn()  argument
2515 denali_phy_params = f1_sdram_params->phy_regs.denali_phy; in dram_copy_phy_fn()
2733 if (f1_sdram_params->base.ddr_freq < 400 * MHz) in dram_copy_phy_fn()
2735 else if (f1_sdram_params->base.ddr_freq < 800 * MHz) in dram_copy_phy_fn()
2737 else if (f1_sdram_params->base.ddr_freq < 1200 * MHz) in dram_copy_phy_fn()
2765 if (f1_sdram_params->base.dramtype == LPDDR4) { in dram_copy_phy_fn()
2767 set_ds_odt(&dram->chan[channel], f1_sdram_params, 1, 0, mr5); in dram_copy_phy_fn()
2768 set_ds_odt(&dram->chan[channel], f1_sdram_params, 1, 1, mr5); in dram_copy_phy_fn()
2770 ctl_fn = get_ctl_fn(f1_sdram_params, fn); in dram_copy_phy_fn()
2771 set_lp4_dq_odt(&dram->chan[channel], f1_sdram_params, in dram_copy_phy_fn()
2773 set_lp4_ca_odt(&dram->chan[channel], f1_sdram_params, in dram_copy_phy_fn()
2775 set_lp4_MR3(&dram->chan[channel], f1_sdram_params, in dram_copy_phy_fn()
2777 set_lp4_MR12(&dram->chan[channel], f1_sdram_params, in dram_copy_phy_fn()
2779 set_lp4_MR14(&dram->chan[channel], f1_sdram_params, in dram_copy_phy_fn()
2782 set_lp4_dq_odt(&dram->chan[channel], f1_sdram_params, in dram_copy_phy_fn()
2784 set_lp4_ca_odt(&dram->chan[channel], f1_sdram_params, in dram_copy_phy_fn()
2786 set_lp4_MR3(&dram->chan[channel], f1_sdram_params, in dram_copy_phy_fn()
2788 set_lp4_MR12(&dram->chan[channel], f1_sdram_params, in dram_copy_phy_fn()
2790 set_lp4_MR14(&dram->chan[channel], f1_sdram_params, in dram_copy_phy_fn()
2823 struct rk3399_sdram_params *f1_sdram_params) in dram_set_phy_fn() argument
2828 dram_copy_phy_fn(dram, sdram_params, fn, f1_sdram_params, in dram_set_phy_fn()