1710 	int ret = 0;  in data_training()  local
1732 		ret = data_training_ca(chan, channel, sdram_params);  in data_training()
1733 		if (ret != 0)  in data_training()
1739 		ret = data_training_wl(chan, channel, sdram_params);  in data_training()
1740 		if (ret != 0)  in data_training()
1746 		ret = data_training_rg(chan, channel, sdram_params);  in data_training()
1747 		if (ret != 0)  in data_training()
1753 		ret = data_training_rl(chan, channel, sdram_params);  in data_training()
1754 		if (ret != 0)  in data_training()
1760 		ret = data_training_wdql(chan, channel, sdram_params);  in data_training()
1761 		if (ret != 0)  in data_training()
1769 	return ret;  in data_training()
1860 	int ret;  in switch_to_phy_index1()  local
1888 		ret = data_training(&dram->chan[channel], channel,  in switch_to_phy_index1()
1890 		if (ret) {  in switch_to_phy_index1()
1892 			return ret;  in switch_to_phy_index1()
2398 	int ret = 0;  in read_mr_for_detect()  local
2405 		ret = -1;  in read_mr_for_detect()
2464 		ret = -1;  in read_mr_for_detect()
2478 	return ret;  in read_mr_for_detect()
2837 	int ret_clk, ret[2];  in dram_set_rate()  local
2878 			ret[channel] = data_training(&dram->chan[channel],  in dram_set_rate()
2885 			if (ret[channel])  in dram_set_rate()
3063 	int ret;  in rk3399_dmc_ofdata_to_platdata()  local
3065 	ret = dev_read_u32_array(dev, "rockchip,sdram-params",  in rk3399_dmc_ofdata_to_platdata()
3068 	if (ret) {  in rk3399_dmc_ofdata_to_platdata()
3070 		       __func__, ret);  in rk3399_dmc_ofdata_to_platdata()
3071 		return ret;  in rk3399_dmc_ofdata_to_platdata()
3073 	ret = regmap_init_mem(dev, &plat->map);  in rk3399_dmc_ofdata_to_platdata()
3074 	if (ret)  in rk3399_dmc_ofdata_to_platdata()
3075 		printf("%s: regmap failed %d\n", __func__, ret);  in rk3399_dmc_ofdata_to_platdata()
3086 	int ret;  in conv_of_platdata()  local
3088 	ret = regmap_init_mem_platdata(dev, dtplat->reg,  in conv_of_platdata()
3091 	if (ret)  in conv_of_platdata()
3092 		return ret;  in conv_of_platdata()
3102 	int ret;  in rk3399_dmc_init()  local
3110 	ret = conv_of_platdata(dev);  in rk3399_dmc_init()
3111 	if (ret)  in rk3399_dmc_init()
3112 		return ret;  in rk3399_dmc_init()
3139 	ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &priv->ddr_clk);  in rk3399_dmc_init()
3141 	ret = clk_get_by_index(dev, 0, &priv->ddr_clk);  in rk3399_dmc_init()
3143 	if (ret) {  in rk3399_dmc_init()
3144 		printf("%s clk get failed %d\n", __func__, ret);  in rk3399_dmc_init()
3145 		return ret;  in rk3399_dmc_init()
3147 	ret = clk_set_rate(&priv->ddr_clk, params->base.ddr_freq * MHz);  in rk3399_dmc_init()
3148 	if (ret < 0) {  in rk3399_dmc_init()
3149 		printf("%s clk set failed %d\n", __func__, ret);  in rk3399_dmc_init()
3150 		return ret;  in rk3399_dmc_init()
3152 	ret = sdram_init(priv, params);  in rk3399_dmc_init()
3153 	if (ret < 0) {  in rk3399_dmc_init()
3154 		printf("%s DRAM init failed %d\n", __func__, ret);  in rk3399_dmc_init()
3155 		return ret;  in rk3399_dmc_init()