Lines Matching refs:ctrl
162 u32 ctrl; in rk_pwm_set_config_v1() local
166 ctrl = readl(priv->base + regs->ctrl); in rk_pwm_set_config_v1()
169 ctrl |= RK_PWM_ENABLE; in rk_pwm_set_config_v1()
171 ctrl &= ~RK_PWM_ENABLE; in rk_pwm_set_config_v1()
179 ctrl |= PWM_LOCK; in rk_pwm_set_config_v1()
180 writel(ctrl, priv->base + regs->ctrl); in rk_pwm_set_config_v1()
192 ctrl &= ~(PWM_DUTY_MASK | PWM_INACTIVE_MASK); in rk_pwm_set_config_v1()
193 ctrl |= priv->conf_polarity; in rk_pwm_set_config_v1()
202 ctrl &= ~PWM_LOCK; in rk_pwm_set_config_v1()
203 writel(ctrl, priv->base + regs->ctrl); in rk_pwm_set_config_v1()
236 u32 ctrl; in rk_pwm_set_enable_v1() local
240 ctrl = readl(priv->base + regs->ctrl); in rk_pwm_set_enable_v1()
241 ctrl &= ~priv->data->enable_conf_mask; in rk_pwm_set_enable_v1()
244 ctrl |= priv->data->enable_conf; in rk_pwm_set_enable_v1()
246 ctrl &= ~priv->data->enable_conf; in rk_pwm_set_enable_v1()
248 writel(ctrl, priv->base + regs->ctrl); in rk_pwm_set_enable_v1()
348 .ctrl = 0x0c,
369 .ctrl = 0x0c,
391 .ctrl = 0x00,
413 .ctrl = 0x0c,
434 .ctrl = 0xc,