386 	int mask = info->vsel_mask;  in _buck_set_value()  local
398 	      __func__, uvolt, buck + 1, info->vsel_reg, mask, val);  in _buck_set_value()
401 		pmic_clrsetbits(pmic, info->vsel_reg, mask, val);  in _buck_set_value()
404 		return pmic_clrsetbits(pmic, info->vsel_reg, mask, val);  in _buck_set_value()
410 	uint mask, value, en_reg;  in _buck_set_enable()  local
441 		mask = 1 << buck;  in _buck_set_enable()
448 		ret = pmic_clrsetbits(pmic, REG_DCDC_EN, mask,  in _buck_set_enable()
449 				      enable ? mask : 0);  in _buck_set_enable()
479 	int mask = info->vsel_mask;  in _buck_set_suspend_value()  local
491 	      __func__, uvolt, buck + 1, info->vsel_sleep_reg, mask, val);  in _buck_set_suspend_value()
493 	return pmic_clrsetbits(pmic, info->vsel_sleep_reg, mask, val);  in _buck_set_suspend_value()
499 	uint mask = 0;  in _buck_get_enable()  local
504 		mask = 1 << buck % 4;  in _buck_get_enable()
510 			mask = 1 << (buck - 4);  in _buck_get_enable()
513 			mask = 1 << buck;  in _buck_get_enable()
519 		mask = 1 << buck;  in _buck_get_enable()
527 			mask = 1 << buck;  in _buck_get_enable()
531 			mask = 1 << 1;  in _buck_get_enable()
540 	return ret & mask ? true : false;  in _buck_get_enable()
687 	uint mask;  in _buck_set_suspend_enable()  local
694 		mask = 1 << buck;  in _buck_set_suspend_enable()
695 		ret = pmic_clrsetbits(pmic, RK816_REG_DCDC_SLP_EN, mask,  in _buck_set_suspend_enable()
696 				      enable ? mask : 0);  in _buck_set_suspend_enable()
700 			mask = 1 << buck;  in _buck_set_suspend_enable()
701 			ret = pmic_clrsetbits(pmic, RK806_BUCK_SUSPEND_EN, mask,  in _buck_set_suspend_enable()
702 					      enable ? mask : 0);  in _buck_set_suspend_enable()
705 				mask = 0x40;  in _buck_set_suspend_enable()
707 				mask = 0x80;  in _buck_set_suspend_enable()
708 			ret = pmic_clrsetbits(pmic, RK806_NLDO_SUSPEND_EN, mask,  in _buck_set_suspend_enable()
709 					      enable ? mask : 0);  in _buck_set_suspend_enable()
714 		mask = 1 << buck;  in _buck_set_suspend_enable()
715 		ret = pmic_clrsetbits(pmic, REG_SLEEP_SET_OFF1, mask,  in _buck_set_suspend_enable()
716 				      enable ? 0 : mask);  in _buck_set_suspend_enable()
721 			mask = 1 << buck;  in _buck_set_suspend_enable()
723 			mask = 1 << 5;	/* BUCK5 for RK809 */  in _buck_set_suspend_enable()
724 		ret = pmic_clrsetbits(pmic, RK817_POWER_SLP_EN(0), mask,  in _buck_set_suspend_enable()
725 				      enable ? mask : 0);  in _buck_set_suspend_enable()
738 	uint mask;  in _buck_get_suspend_enable()  local
743 		mask = 1 << buck;  in _buck_get_suspend_enable()
747 		ret = val & mask ? 1 : 0;  in _buck_get_suspend_enable()
751 			mask = 1 << buck % 7;  in _buck_get_suspend_enable()
754 			mask = 1 << ((buck - 7) + 6);  in _buck_get_suspend_enable()
760 		ret = val & mask ? 1 : 0;  in _buck_get_suspend_enable()
764 		mask = 1 << buck;  in _buck_get_suspend_enable()
768 		ret = val & mask ? 0 : 1;  in _buck_get_suspend_enable()
773 			mask = 1 << buck;  in _buck_get_suspend_enable()
775 			mask = 1 << 5;	/* BUCK5 for RK809 */  in _buck_get_suspend_enable()
780 		ret = val & mask ? 1 : 0;  in _buck_get_suspend_enable()
819 	uint mask = 0;  in _ldo_get_enable()  local
826 			mask = 1 << (ldo - 4);  in _ldo_get_enable()
829 			mask = 1 << ldo;  in _ldo_get_enable()
835 			mask = 1 << ldo % 4;  in _ldo_get_enable()
838 			mask = 1 << 2;  in _ldo_get_enable()
844 		mask = 1 << ldo;  in _ldo_get_enable()
852 			mask = 1 << ldo;  in _ldo_get_enable()
855 			mask = 1 << (ldo - 4);  in _ldo_get_enable()
858 			mask = 1 << 0;  in _ldo_get_enable()
869 	return ret & mask ? true : false;  in _ldo_get_enable()
875 	uint mask, value, en_reg;  in _ldo_set_enable()  local
913 		mask = 1 << ldo;  in _ldo_set_enable()
914 		ret = pmic_clrsetbits(pmic, REG_LDO_EN, mask,  in _ldo_set_enable()
915 				      enable ? mask : 0);  in _ldo_set_enable()
947 	uint mask;  in _ldo_set_suspend_enable()  local
953 		mask = 1 << ldo;  in _ldo_set_suspend_enable()
954 		ret = pmic_clrsetbits(pmic, RK816_REG_LDO_SLP_EN, mask,  in _ldo_set_suspend_enable()
955 				      enable ? mask : 0);  in _ldo_set_suspend_enable()
958 		mask = 1 << ldo;  in _ldo_set_suspend_enable()
959 		ret = pmic_clrsetbits(pmic, RK806_NLDO_SUSPEND_EN, mask,  in _ldo_set_suspend_enable()
960 				      enable ? mask : 0);  in _ldo_set_suspend_enable()
964 		mask = 1 << ldo;  in _ldo_set_suspend_enable()
965 		ret = pmic_clrsetbits(pmic, REG_SLEEP_SET_OFF2, mask,  in _ldo_set_suspend_enable()
966 				      enable ? 0 : mask);  in _ldo_set_suspend_enable()
971 			mask = 1 << 4;	/* LDO9 */  in _ldo_set_suspend_enable()
972 			ret = pmic_clrsetbits(pmic, RK817_POWER_SLP_EN(0), mask,  in _ldo_set_suspend_enable()
973 					      enable ? mask : 0);  in _ldo_set_suspend_enable()
975 			mask = 1 << ldo;  in _ldo_set_suspend_enable()
976 			ret = pmic_clrsetbits(pmic, RK817_POWER_SLP_EN(1), mask,  in _ldo_set_suspend_enable()
977 					      enable ? mask : 0);  in _ldo_set_suspend_enable()
989 	uint mask;  in _ldo_get_suspend_enable()  local
994 		mask = 1 << ldo;  in _ldo_get_suspend_enable()
998 		ret = val & mask ? 1 : 0;  in _ldo_get_suspend_enable()
1001 		mask = 1 << ldo;  in _ldo_get_suspend_enable()
1006 		ret = val & mask ? 1 : 0;  in _ldo_get_suspend_enable()
1010 		mask = 1 << ldo;  in _ldo_get_suspend_enable()
1014 		ret = val & mask ? 0 : 1;  in _ldo_get_suspend_enable()
1019 			mask = 1 << 4;	/* LDO9 */  in _ldo_get_suspend_enable()
1023 			ret = val & mask ? 1 : 0;  in _ldo_get_suspend_enable()
1025 			mask = 1 << ldo;  in _ldo_get_suspend_enable()
1029 			ret = val & mask ? 1 : 0;  in _ldo_get_suspend_enable()
1041 	int mask = info->vsel_mask;  in buck_get_value()  local
1051 	val = ret & mask;  in buck_get_value()
1077 	int mask = info->vsel_mask;  in buck_get_suspend_value()  local
1087 	val = ret & mask;  in buck_get_suspend_value()
1148 	int mask = info->vsel_mask;  in ldo_get_value()  local
1156 	val = ret & mask;  in ldo_get_value()
1165 	int mask = info->vsel_mask;  in ldo_set_value()  local
1177 	      __func__, uvolt, ldo + 1, info->vsel_reg, mask, val);  in ldo_set_value()
1179 	return pmic_clrsetbits(dev->parent, info->vsel_reg, mask, val);  in ldo_set_value()
1186 	int mask = info->vsel_mask;  in ldo_set_suspend_value()  local
1198 	      __func__, uvolt, ldo + 1, info->vsel_sleep_reg, mask, val);  in ldo_set_suspend_value()
1200 	return pmic_clrsetbits(dev->parent, info->vsel_sleep_reg, mask, val);  in ldo_set_suspend_value()
1207 	int mask = info->vsel_mask;  in ldo_get_suspend_value()  local
1217 	val = ret & mask;  in ldo_get_suspend_value()
1256 	uint mask = 0;  in switch_set_enable()  local
1260 		mask = 1 << (sw + 5);  in switch_set_enable()
1261 		ret = pmic_clrsetbits(dev->parent, REG_DCDC_EN, mask,  in switch_set_enable()
1262 				      enable ? mask : 0);  in switch_set_enable()
1266 		mask = (1 << (sw + 2)) | (1 << (sw + 6));  in switch_set_enable()
1267 		ret = pmic_clrsetbits(dev->parent, RK817_POWER_EN(3), mask,  in switch_set_enable()
1268 				      enable ? mask : (1 << (sw + 6)));  in switch_set_enable()
1277 		mask = (1 << (sw + 2)) | (1 << (sw + 6));  in switch_set_enable()
1278 		ret = pmic_clrsetbits(dev->parent, RK817_POWER_EN(3), mask,  in switch_set_enable()
1279 				      enable ? mask : (1 << (sw + 6)));  in switch_set_enable()
1282 		mask = 1 << 6;  in switch_set_enable()
1283 		ret = pmic_clrsetbits(dev->parent, REG_DCDC_EN, mask,  in switch_set_enable()
1284 				      enable ? mask : 0);  in switch_set_enable()
1289 	      __func__, sw + 1, enable, mask);  in switch_set_enable()
1300 	uint mask = 0;  in switch_get_enable()  local
1304 		mask = 1 << (sw + 5);  in switch_get_enable()
1315 				mask = 1 << (sw + 2);  in switch_get_enable()
1322 		mask = 1 << (sw + 2);  in switch_get_enable()
1326 		mask = 1 << 6;  in switch_get_enable()
1334 	return ret & mask ? true : false;  in switch_get_enable()
1353 	uint mask = 0;  in switch_set_suspend_enable()  local
1357 		mask = 1 << (sw + 5);  in switch_set_suspend_enable()
1358 		ret = pmic_clrsetbits(dev->parent, REG_SLEEP_SET_OFF1, mask,  in switch_set_suspend_enable()
1359 				      enable ? 0 : mask);  in switch_set_suspend_enable()
1363 		mask = 1 << (sw + 6);  in switch_set_suspend_enable()
1364 		ret = pmic_clrsetbits(dev->parent, RK817_POWER_SLP_EN(0), mask,  in switch_set_suspend_enable()
1365 				      enable ? mask : 0);  in switch_set_suspend_enable()
1373 		mask = 1 << (sw + 6);  in switch_set_suspend_enable()
1374 		ret = pmic_clrsetbits(dev->parent, RK817_POWER_SLP_EN(0), mask,  in switch_set_suspend_enable()
1375 				      enable ? mask : 0);  in switch_set_suspend_enable()
1378 		mask = 1 << 6;  in switch_set_suspend_enable()
1379 		ret = pmic_clrsetbits(dev->parent, REG_SLEEP_SET_OFF1, mask,  in switch_set_suspend_enable()
1380 				      enable ? 0 : mask);  in switch_set_suspend_enable()
1385 	      __func__, sw + 1, enable, mask);  in switch_set_suspend_enable()
1396 	uint mask = 0;  in switch_get_suspend_enable()  local
1400 		mask = 1 << (sw + 5);  in switch_get_suspend_enable()
1404 		ret = val & mask ? 0 : 1;  in switch_get_suspend_enable()
1407 		mask = 1 << (sw + 6);  in switch_get_suspend_enable()
1411 		ret = val & mask ? 1 : 0;  in switch_get_suspend_enable()
1421 				mask = 1 << (sw + 6);  in switch_get_suspend_enable()
1425 				ret = val & mask ? 1 : 0;  in switch_get_suspend_enable()
1430 		mask = 1 << 6;  in switch_get_suspend_enable()
1434 		ret = val & mask ? 0 : 1;  in switch_get_suspend_enable()
1493 	uint mask = 0, en_reg;  in _pldo_get_enable()  local
1500 			mask = RK806_PLDO0_2_SET(pldo);  in _pldo_get_enable()
1502 				mask = (1 << 0);  in _pldo_get_enable()
1507 				mask = (1 << 0);  in _pldo_get_enable()
1509 				mask = (1 << 1);  in _pldo_get_enable()
1521 	return ret & mask ? true : false;  in _pldo_get_enable()
1574 	int mask = info->vsel_mask;  in pldo_get_value()  local
1583 	val = ret & mask;  in pldo_get_value()
1592 	int mask = info->vsel_mask;  in pldo_set_value()  local
1604 	      __func__, uvolt, ldo + 1, info->vsel_reg, mask, val);  in pldo_set_value()
1606 	return pmic_clrsetbits(dev->parent, info->vsel_reg, mask, val);  in pldo_set_value()
1627 	int mask = info->vsel_mask;  in pldo_set_suspend_value()  local
1638 	return pmic_clrsetbits(dev->parent, info->vsel_sleep_reg, mask, val);  in pldo_set_suspend_value()
1645 	int mask = info->vsel_mask;  in pldo_get_suspend_value()  local
1655 	val = ret & mask;  in pldo_get_suspend_value()
1662 	uint mask;  in _pldo_set_suspend_enable()  local
1666 		mask = 1 << (ldo + 1);  in _pldo_set_suspend_enable()
1668 		mask = 1;  in _pldo_set_suspend_enable()
1669 	ret = pmic_clrsetbits(pmic, RK806_PLDO_SUSPEND_EN, mask,  in _pldo_set_suspend_enable()
1670 			      enable ? mask : 0);  in _pldo_set_suspend_enable()
1677 	uint mask, val;  in _pldo_get_suspend_enable()  local
1681 		mask = 1 << (ldo + 1);  in _pldo_get_suspend_enable()
1683 		mask = 1;  in _pldo_get_suspend_enable()
1688 	ret = val & mask ? 1 : 0;  in _pldo_get_suspend_enable()
1723 	uint mask = 0;  in boost_set_enable()  local
1728 		mask = 0x22;  in boost_set_enable()
1729 		ret = pmic_clrsetbits(dev->parent, RK817_POWER_EN(3), mask,  in boost_set_enable()
1735 	      __func__, enable, mask);  in boost_set_enable()
1743 	uint mask = 0;  in boost_get_enable()  local
1748 		mask = 0x02;  in boost_get_enable()
1756 	return ret & mask ? true : false;  in boost_get_enable()
1764 	int mask = info->vsel_mask;  in boost_set_suspend_value()  local
1780 		      __func__, uvolt, info->vsel_sleep_reg, mask, val);  in boost_set_suspend_value()
1782 		return pmic_clrsetbits(dev->parent, info->vsel_sleep_reg, mask, val);  in boost_set_suspend_value()
1792 	int mask = info->vsel_mask;  in boost_get_suspend_value()  local
1802 		val = ret & mask;  in boost_get_suspend_value()
1812 	uint mask = 0;  in boost_set_suspend_enable()  local
1817 		mask = 1 << 5;  in boost_set_suspend_enable()
1818 		ret = pmic_clrsetbits(dev->parent, RK817_POWER_SLP_EN(0), mask,  in boost_set_suspend_enable()
1819 				      enable ? mask : 0);  in boost_set_suspend_enable()
1824 	      __func__, enable, mask);  in boost_set_suspend_enable()
1833 	uint mask = 0;  in boost_get_suspend_enable()  local
1837 		mask = 1 << 5;  in boost_get_suspend_enable()
1841 		ret = val & mask ? 1 : 0;  in boost_get_suspend_enable()
1853 	int mask = info->vsel_mask;  in boost_get_value()  local
1863 		val = ret & mask;  in boost_get_value()
1876 	int mask = info->vsel_mask;  in boost_set_value()  local
1893 		      __func__, uvolt, info->vsel_reg, mask, val);  in boost_set_value()
1895 		return pmic_clrsetbits(dev->parent, info->vsel_reg, mask, val);  in boost_set_value()