312 	struct udevice *pmic = dev->parent;  in rk801_regulator_get_value()  local
327 	val = pmic_reg_read(pmic, vsel_reg);  in rk801_regulator_get_value()
344 	struct udevice *pmic = dev->parent;  in rk801_regulator_set_value()  local
345 	struct rk801_priv *priv = dev_get_priv(pmic);  in rk801_regulator_set_value()
372 		ret = pmic_clrsetbits(pmic, reg, desc->vsel_mask, sel);  in rk801_regulator_set_value()
381 			ret = pmic_clrsetbits(pmic, reg1, desc->vsel_mask, sel);  in rk801_regulator_set_value()
383 			ret = pmic_clrsetbits(pmic, reg0, desc->vsel_mask, sel);  in rk801_regulator_set_value()
407 		return pmic_clrsetbits(pmic, reg, desc->vsel_mask, sel);  in rk801_regulator_set_value()
414 	struct udevice *pmic = dev->parent;  in rk801_regulator_get_enable()  local
421 		val = pmic_reg_read(pmic, desc->enable_reg);  in rk801_regulator_get_enable()
429 		val = pmic_reg_read(pmic, RK801_POWER_SLP_EN_REG);  in rk801_regulator_get_enable()
440 	struct udevice *pmic = dev->parent;  in rk801_regulator_set_enable()  local
452 	return pmic_clrsetbits(pmic, desc->enable_reg, desc->enable_mask, val);  in rk801_regulator_set_enable()
458 	struct udevice *pmic = dev->parent;  in rk801_regulator_set_suspend_enable()  local
467 	return pmic_clrsetbits(pmic, RK801_POWER_SLP_EN_REG,  in rk801_regulator_set_suspend_enable()
590 	struct udevice *pmic = dev->parent;  in rk801_buck_probe()  local
612 	ret = pmic_clrsetbits(pmic, RK801_SYS_CFG2_REG,  in rk801_buck_probe()
617 	ret = pmic_clrsetbits(pmic, RK801_SLEEP_CFG_REG,  in rk801_buck_probe()
623 	ret = pmic_clrsetbits(pmic, RK801_SLP_LP_CONFIG_REG,  in rk801_buck_probe()
629 	en0 = pmic_reg_read(pmic, RK801_POWER_EN0_REG);  in rk801_buck_probe()
633 	en1 = pmic_reg_read(pmic, RK801_POWER_EN1_REG);  in rk801_buck_probe()
638 	ret = pmic_reg_write(pmic, RK801_POWER_SLP_EN_REG, val);  in rk801_buck_probe()
644 		val = pmic_reg_read(pmic, rdev[i].reg_src);  in rk801_buck_probe()
648 		ret = pmic_reg_write(pmic, rdev[i].reg_dst, val);  in rk801_buck_probe()