49 	struct pfuze100_regulator_desc *desc;  member
246 static struct pfuze100_regulator_desc *se_desc(struct pfuze100_regulator_desc *desc,  in se_desc()  argument
252 	for (i = 0; i < size; desc++) {  in se_desc()
253 		if (!strcmp(desc->name, name))  in se_desc()
254 			return desc;  in se_desc()
265 	struct pfuze100_regulator_desc *desc;  in pfuze100_regulator_probe()  local
269 		desc = se_desc(pfuze100_regulators,  in pfuze100_regulator_probe()
274 		desc = se_desc(pfuze200_regulators,  in pfuze100_regulator_probe()
279 		desc = se_desc(pfuze3000_regulators,  in pfuze100_regulator_probe()
287 	if (!desc) {  in pfuze100_regulator_probe()
292 	plat->desc = desc;  in pfuze100_regulator_probe()
295 	uc_pdata->type = desc->type;  in pfuze100_regulator_probe()
319 	struct pfuze100_regulator_desc *desc = plat->desc;  in pfuze100_regulator_mode()  local
322 		if (desc->type == REGULATOR_TYPE_BUCK) {  in pfuze100_regulator_mode()
325 						    desc->vsel_reg);  in pfuze100_regulator_mode()
336 					    desc->vsel_reg +  in pfuze100_regulator_mode()
347 		} else if (desc->type == REGULATOR_TYPE_LDO) {  in pfuze100_regulator_mode()
348 			val = pmic_reg_read(dev->parent, desc->vsel_reg);  in pfuze100_regulator_mode()
362 	if (desc->type == REGULATOR_TYPE_BUCK) {  in pfuze100_regulator_mode()
364 			return pmic_clrsetbits(dev->parent, desc->vsel_reg,  in pfuze100_regulator_mode()
369 				       desc->vsel_reg + PFUZE100_MODE_OFFSET,  in pfuze100_regulator_mode()
373 	} else if (desc->type == REGULATOR_TYPE_LDO) {  in pfuze100_regulator_mode()
374 		val = pmic_clrsetbits(dev->parent, desc->vsel_reg,  in pfuze100_regulator_mode()
453 	struct pfuze100_regulator_desc *desc = plat->desc;  in pfuze100_regulator_val()  local
460 			*uV = desc->voltage;  in pfuze100_regulator_val()
461 		} else if (desc->volt_table) {  in pfuze100_regulator_val()
462 			val = pmic_reg_read(dev->parent, desc->vsel_reg);  in pfuze100_regulator_val()
465 			val &= desc->vsel_mask;  in pfuze100_regulator_val()
466 			*uV = desc->volt_table[val];  in pfuze100_regulator_val()
472 			val = pmic_reg_read(dev->parent, desc->vsel_reg);  in pfuze100_regulator_val()
475 			val &= desc->vsel_mask;  in pfuze100_regulator_val()
476 			*uV = uc_pdata->min_uV + (int)val * desc->uV_step;  in pfuze100_regulator_val()
485 	} else if (desc->volt_table) {  in pfuze100_regulator_val()
486 		for (i = 0; i < desc->vsel_mask; i++) {  in pfuze100_regulator_val()
487 			if (*uV == desc->volt_table[i])  in pfuze100_regulator_val()
490 		if (i == desc->vsel_mask) {  in pfuze100_regulator_val()
495 		return pmic_clrsetbits(dev->parent, desc->vsel_reg,  in pfuze100_regulator_val()
496 				       desc->vsel_mask, i);  in pfuze100_regulator_val()
502 		return pmic_clrsetbits(dev->parent, desc->vsel_reg,  in pfuze100_regulator_val()
503 				       desc->vsel_mask,  in pfuze100_regulator_val()
504 				       (*uV - uc_pdata->min_uV) / desc->uV_step);  in pfuze100_regulator_val()