997 					struct phy_configure_opts_dp *dp)  in rockchip_dpphy_verify_config()  argument
1002 	if (dp->set_rate) {  in rockchip_dpphy_verify_config()
1003 		switch (dp->link_rate) {  in rockchip_dpphy_verify_config()
1016 	switch (dp->lanes) {  in rockchip_dpphy_verify_config()
1030 	if (dp->set_voltages) {  in rockchip_dpphy_verify_config()
1032 		for (i = 0; i < dp->lanes; i++) {  in rockchip_dpphy_verify_config()
1033 			if (dp->voltage[i] > 3 || dp->pre[i] > 3)  in rockchip_dpphy_verify_config()
1040 			if (dp->voltage[i] + dp->pre[i] > 3)  in rockchip_dpphy_verify_config()
1049 			   struct phy_configure_opts_dp *dp)  in dp_phy_set_rate()  argument
1057 	switch (dp->link_rate) {  in dp_phy_set_rate()
1077 			   FIELD_PREP(CMN_ROPLL_SSC_EN, dp->ssc));  in dp_phy_set_rate()
1116 			       struct phy_configure_opts_dp *dp)  in dp_phy_set_voltages()  argument
1120 	for (i = 0; i < dp->lanes; i++) {  in dp_phy_set_voltages()
1122 		switch (dp->link_rate) {  in dp_phy_set_voltages()
1138 		dp_phy_set_voltage(udphy, udphy->bw, dp->voltage[i], dp->pre[i], lane);  in dp_phy_set_voltages()
1151 	ret = rockchip_dpphy_verify_config(udphy, &opts->dp);  in rockchip_dpphy_configure()
1155 	if (opts->dp.set_rate) {  in rockchip_dpphy_configure()
1156 		ret = dp_phy_set_rate(udphy, &opts->dp);  in rockchip_dpphy_configure()
1164 	if (opts->dp.set_voltages) {  in rockchip_dpphy_configure()
1165 		ret = dp_phy_set_voltages(udphy, &opts->dp);  in rockchip_dpphy_configure()