Lines Matching refs:priv
61 int (*phy_init)(struct rockchip_p3phy_priv *priv);
68 static int rockchip_p3phy_rk3568_init(struct rockchip_p3phy_priv *priv) in rockchip_p3phy_rk3568_init() argument
74 regmap_write(priv->phy_grf, GRF_PCIE30PHY_RK3568_CON9, in rockchip_p3phy_rk3568_init()
78 if (priv->is_bifurcation) { in rockchip_p3phy_rk3568_init()
79 regmap_write(priv->phy_grf, GRF_PCIE30PHY_RK3568_CON6, in rockchip_p3phy_rk3568_init()
81 regmap_write(priv->phy_grf, GRF_PCIE30PHY_RK3568_CON1, in rockchip_p3phy_rk3568_init()
85 regmap_write(priv->phy_grf, GRF_PCIE30PHY_RK3568_CON4, in rockchip_p3phy_rk3568_init()
87 regmap_write(priv->phy_grf, GRF_PCIE30PHY_RK3568_CON4, in rockchip_p3phy_rk3568_init()
89 reset_deassert(&priv->p30phy); in rockchip_p3phy_rk3568_init()
91 ret = regmap_read_poll_timeout(priv->phy_grf, in rockchip_p3phy_rk3568_init()
101 regmap_write(priv->phy_grf, GRF_PCIE30PHY_RK3568_CON9, in rockchip_p3phy_rk3568_init()
104 writel(phy_fw[i], priv->mmio + (i<<2)); in rockchip_p3phy_rk3568_init()
106 regmap_write(priv->phy_grf, GRF_PCIE30PHY_RK3568_CON9, in rockchip_p3phy_rk3568_init()
108 regmap_write(priv->phy_grf, GRF_PCIE30PHY_RK3568_CON4, in rockchip_p3phy_rk3568_init()
120 static int rockchip_p3phy_rk3588_init(struct rockchip_p3phy_priv *priv) in rockchip_p3phy_rk3588_init() argument
126 regmap_write(priv->phy_grf, RK3588_PCIE3PHY_GRF_CMN_CON0, in rockchip_p3phy_rk3588_init()
130 if (priv->pcie30_phymode > 4) in rockchip_p3phy_rk3588_init()
131 priv->pcie30_phymode = PHY_MODE_PCIE_AGGREGATION; in rockchip_p3phy_rk3588_init()
133 regmap_write(priv->phy_grf, RK3588_PCIE3PHY_GRF_CMN_CON0, in rockchip_p3phy_rk3588_init()
134 (0x7<<16) | priv->pcie30_phymode); in rockchip_p3phy_rk3588_init()
137 reg = priv->pcie30_phymode & 3; in rockchip_p3phy_rk3588_init()
139 regmap_write(priv->pipe_grf, PHP_GRF_PCIESEL_CON, in rockchip_p3phy_rk3588_init()
144 regmap_read(priv->phy_grf, RK3588_PCIE3PHY_GRF_PHY0_STATUS1, ®); in rockchip_p3phy_rk3588_init()
157 regmap_read(priv->phy_grf, RK3588_PCIE3PHY_GRF_PHY1_STATUS1, ®); in rockchip_p3phy_rk3588_init()
168 reset_deassert(&priv->p30phy); in rockchip_p3phy_rk3588_init()
180 struct rockchip_p3phy_priv *priv = dev_get_priv(phy->dev); in rochchip_p3phy_init() local
183 ret = clk_enable_bulk(&priv->clks); in rochchip_p3phy_init()
189 reset_assert(&priv->p30phy); in rochchip_p3phy_init()
192 if (priv->ops->phy_init) { in rochchip_p3phy_init()
193 ret = priv->ops->phy_init(priv); in rochchip_p3phy_init()
195 clk_disable_bulk(&priv->clks); in rochchip_p3phy_init()
206 struct rockchip_p3phy_priv *priv = dev_get_priv(phy->dev); in rochchip_p3phy_exit() local
208 clk_disable_bulk(&priv->clks); in rochchip_p3phy_exit()
209 reset_assert(&priv->p30phy); in rochchip_p3phy_exit()
215 struct rockchip_p3phy_priv *priv = dev_get_priv(dev); in rockchip_p3phy_probe() local
220 priv->mmio = (void __iomem *)dev_read_addr(dev); in rockchip_p3phy_probe()
221 if ((fdt_addr_t)priv->mmio == FDT_ADDR_T_NONE) in rockchip_p3phy_probe()
224 priv->ops = (struct rockchip_p3phy_ops *)dev_get_driver_data(dev); in rockchip_p3phy_probe()
225 if (!priv->ops) { in rockchip_p3phy_probe()
237 priv->phy_grf = syscon_get_regmap(syscon); in rockchip_p3phy_probe()
238 if (IS_ERR(priv->phy_grf)) { in rockchip_p3phy_probe()
240 return PTR_ERR(priv->phy_grf); in rockchip_p3phy_probe()
243 dev_dbg(priv->dev, "phy_grf is 0x%llx\n", priv->phy_grf->base); in rockchip_p3phy_probe()
249 priv->pipe_grf = NULL; in rockchip_p3phy_probe()
254 priv->pipe_grf = syscon_get_regmap(syscon); in rockchip_p3phy_probe()
255 if (IS_ERR(priv->pipe_grf)) in rockchip_p3phy_probe()
259 …priv->pcie30_phymode = dev_read_u32_default(dev, "rockchip,pcie30-phymode", PHY_MODE_PCIE_AGGREGAT… in rockchip_p3phy_probe()
262 ret = reset_get_by_name(dev, "phy", &priv->p30phy); in rockchip_p3phy_probe()
278 struct rockchip_p3phy_priv *priv = dev_get_priv(phy->dev); in rockchip_p3phy_configure() local
280 priv->is_bifurcation = opts->pcie.is_bifurcation; in rockchip_p3phy_configure()