666 					    struct phy_configure_opts_dp *dp)  in rockchip_hdptx_phy_verify_config()  argument
670 	if (dp->set_rate) {  in rockchip_hdptx_phy_verify_config()
671 		switch (dp->link_rate) {  in rockchip_hdptx_phy_verify_config()
685 	switch (dp->lanes) {  in rockchip_hdptx_phy_verify_config()
694 	if (dp->set_voltages) {  in rockchip_hdptx_phy_verify_config()
695 		for (i = 0; i < dp->lanes; i++) {  in rockchip_hdptx_phy_verify_config()
696 			if (dp->voltage[i] > 3 || dp->pre[i] > 3)  in rockchip_hdptx_phy_verify_config()
699 			if (dp->voltage[i] + dp->pre[i] > 3)  in rockchip_hdptx_phy_verify_config()
708 					   struct phy_configure_opts_dp *dp,  in rockchip_hdptx_phy_set_voltage()  argument
713 	switch (dp->link_rate) {  in rockchip_hdptx_phy_set_voltage()
716 			ctrl = &tx_drv_ctrl_rbr_dp_mode[dp->voltage[lane]][dp->pre[lane]];  in rockchip_hdptx_phy_set_voltage()
718 			ctrl = &tx_drv_ctrl_rbr[dp->voltage[lane]][dp->pre[lane]];  in rockchip_hdptx_phy_set_voltage()
731 		ctrl = &tx_drv_ctrl_r216_r243[dp->voltage[lane]][dp->pre[lane]];  in rockchip_hdptx_phy_set_voltage()
744 			ctrl = &tx_drv_ctrl_hbr_dp_mode[dp->voltage[lane]][dp->pre[lane]];  in rockchip_hdptx_phy_set_voltage()
746 			ctrl = &tx_drv_ctrl_hbr[dp->voltage[lane]][dp->pre[lane]];  in rockchip_hdptx_phy_set_voltage()
758 		ctrl = &tx_drv_ctrl_r324[dp->voltage[lane]][dp->pre[lane]];  in rockchip_hdptx_phy_set_voltage()
770 		ctrl = &tx_drv_ctrl_r432[dp->voltage[lane]][dp->pre[lane]];  in rockchip_hdptx_phy_set_voltage()
783 		ctrl = &tx_drv_ctrl_hbr2[dp->voltage[lane]][dp->pre[lane]];  in rockchip_hdptx_phy_set_voltage()
844 					   struct phy_configure_opts_dp *dp)  in rockchip_hdptx_phy_set_voltages()  argument
850 	for (lane = 0; lane < dp->lanes; lane++)  in rockchip_hdptx_phy_set_voltages()
851 		rockchip_hdptx_phy_set_voltage(hdptx, dp, lane);  in rockchip_hdptx_phy_set_voltages()
880 				       struct phy_configure_opts_dp *dp)  in rockchip_hdptx_phy_set_rate()  argument
896 	switch (dp->link_rate) {  in rockchip_hdptx_phy_set_rate()
926 	if (is_extra_recommended_link_rate(dp->link_rate)) {  in rockchip_hdptx_phy_set_rate()
970 	if (dp->ssc) {  in rockchip_hdptx_phy_set_rate()
975 		if (is_extra_recommended_link_rate(dp->link_rate)) {  in rockchip_hdptx_phy_set_rate()
1024 			   FIELD_PREP(LANE_EN, GENMASK(dp->lanes - 1, 0)));  in rockchip_hdptx_phy_set_rate()
1039 	ret = rockchip_hdptx_phy_verify_config(hdptx, &opts->dp);  in rockchip_hdptx_phy_configure()
1045 	if (opts->dp.set_rate) {  in rockchip_hdptx_phy_configure()
1046 		ret = rockchip_hdptx_phy_set_rate(hdptx, &opts->dp);  in rockchip_hdptx_phy_configure()
1053 	if (opts->dp.set_voltages) {  in rockchip_hdptx_phy_configure()
1054 		ret = rockchip_hdptx_phy_set_voltages(hdptx, &opts->dp);  in rockchip_hdptx_phy_configure()