92 					 struct phy_configure_opts_dp *dp,  in rockchip_edp_phy_set_voltage()  argument
97 	amp = vp[dp->voltage[lane]][dp->pre[lane]].amp;  in rockchip_edp_phy_set_voltage()
98 	amp_scale = vp[dp->voltage[lane]][dp->pre[lane]].amp_scale;  in rockchip_edp_phy_set_voltage()
99 	emp = vp[dp->voltage[lane]][dp->pre[lane]].emp;  in rockchip_edp_phy_set_voltage()
150 					 struct phy_configure_opts_dp *dp)  in rockchip_edp_phy_set_voltages()  argument
155 	for (lane = 0; lane < dp->lanes; lane++)  in rockchip_edp_phy_set_voltages()
156 		rockchip_edp_phy_set_voltage(edpphy, dp, lane);  in rockchip_edp_phy_set_voltages()
162 				     struct phy_configure_opts_dp *dp)  in rockchip_edp_phy_set_rate()  argument
177 	switch (dp->link_rate) {  in rockchip_edp_phy_set_rate()
212 	if (dp->ssc)  in rockchip_edp_phy_set_rate()
226 			   FIELD_PREP(EDP_PHY_TX_PD, ~GENMASK(dp->lanes - 1, 0)));  in rockchip_edp_phy_set_rate()
237 			   FIELD_PREP(EDP_PHY_TX_IDLE, ~GENMASK(dp->lanes - 1, 0)));  in rockchip_edp_phy_set_rate()
243 					  struct phy_configure_opts_dp *dp)  in rockchip_edp_phy_verify_config()  argument
248 	if (dp->set_rate) {  in rockchip_edp_phy_verify_config()
249 		switch (dp->link_rate) {  in rockchip_edp_phy_verify_config()
260 	switch (dp->lanes) {  in rockchip_edp_phy_verify_config()
274 	if (dp->set_voltages) {  in rockchip_edp_phy_verify_config()
276 		for (i = 0; i < dp->lanes; i++) {  in rockchip_edp_phy_verify_config()
277 			if (dp->voltage[i] > 3 || dp->pre[i] > 3)  in rockchip_edp_phy_verify_config()
284 			if (dp->voltage[i] + dp->pre[i] > 3)  in rockchip_edp_phy_verify_config()
298 	ret = rockchip_edp_phy_verify_config(edpphy, &opts->dp);  in rockchip_edp_phy_configure()
304 	if (opts->dp.set_rate) {  in rockchip_edp_phy_configure()
305 		ret = rockchip_edp_phy_set_rate(edpphy, &opts->dp);  in rockchip_edp_phy_configure()
313 	if (opts->dp.set_voltages) {  in rockchip_edp_phy_configure()
314 		ret = rockchip_edp_phy_set_voltages(edpphy, &opts->dp);  in rockchip_edp_phy_configure()