374 		pr_err("property \"assigned-addresses\" not found");  in tegra_pcie_port_parse_dt()
465 		pr_err("failed to parse \"nvidia,num-lanes\" property");  in tegra_pcie_parse_port_info()
473 		pr_err("failed to parse \"reg\" property");  in tegra_pcie_parse_port_info()
496 		pr_err("resource \"pads\" not found");  in tegra_pcie_parse_dt()
502 		pr_err("resource \"afi\" not found");  in tegra_pcie_parse_dt()
508 		pr_err("resource \"cs\" not found");  in tegra_pcie_parse_dt()
514 		pr_err("tegra_pcie_board_init() failed: err=%d", err);  in tegra_pcie_parse_dt()
523 			pr_err("failed to prepare PHY: %d", err);  in tegra_pcie_parse_dt()
535 			pr_err("failed to obtain root port info");  in tegra_pcie_parse_dt()
565 		pr_err("invalid lane configuration");  in tegra_pcie_parse_dt()
579 		pr_err("power_domain_on() failed: %d\n", ret);  in tegra_pcie_power_on()
585 		pr_err("clk_enable(afi) failed: %d\n", ret);  in tegra_pcie_power_on()
591 		pr_err("clk_enable(pex) failed: %d\n", ret);  in tegra_pcie_power_on()
597 		pr_err("reset_deassert(afi) failed: %d\n", ret);  in tegra_pcie_power_on()
603 		pr_err("reset_deassert(pex) failed: %d\n", ret);  in tegra_pcie_power_on()
623 		pr_err("failed to power off PCIe partition: %d", err);  in tegra_pcie_power_on()
630 		pr_err("failed to power up PCIe partition: %d", err);  in tegra_pcie_power_on()
650 		pr_err("failed to enable PLLE: %d\n", err);  in tegra_pcie_power_on()
710 		pr_err("PLL failed to lock: %d", err);  in tegra_pcie_phy_enable()
774 		pr_err("failed to power on PHY: %d\n", err);
783 		pr_err("reset_deassert(pcie_x) failed: %d\n", err);
1148 		pr_err("failed to power on");
1154 		pr_err("failed to enable controller");
1160 		pr_err("failed to decode ranges");
1166 		pr_err("failed to enable PCIe");