116 int phy_read_mmd_indirect(struct phy_device *phydev, int prtad,  in phy_read_mmd_indirect()  argument
122 	phy_write(phydev, addr, MII_MMD_CTRL, devad);  in phy_read_mmd_indirect()
125 	phy_write(phydev, addr, MII_MMD_DATA, prtad);  in phy_read_mmd_indirect()
128 	phy_write(phydev, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));  in phy_read_mmd_indirect()
131 	value = phy_read(phydev, addr, MII_MMD_DATA);  in phy_read_mmd_indirect()
151 void phy_write_mmd_indirect(struct phy_device *phydev, int prtad,  in phy_write_mmd_indirect()  argument
155 	phy_write(phydev, addr, MII_MMD_CTRL, devad);  in phy_write_mmd_indirect()
158 	phy_write(phydev, addr, MII_MMD_DATA, prtad);  in phy_write_mmd_indirect()
161 	phy_write(phydev, addr, MII_MMD_CTRL, (devad | MII_MMD_CTRL_NOINCR));  in phy_write_mmd_indirect()
164 	phy_write(phydev, addr, MII_MMD_DATA, data);  in phy_write_mmd_indirect()
173 static int dp83867_of_init(struct phy_device *phydev)  in dp83867_of_init()  argument
175 	struct dp83867_private *dp83867 = phydev->priv;  in dp83867_of_init()
176 	struct udevice *dev = phydev->dev;  in dp83867_of_init()
199 static int dp83867_of_init(struct phy_device *phydev)  in dp83867_of_init()  argument
201 	struct dp83867_private *dp83867 = phydev->priv;  in dp83867_of_init()
212 static int dp83867_config(struct phy_device *phydev)  in dp83867_config()  argument
218 	if (!phydev->priv) {  in dp83867_config()
223 		phydev->priv = dp83867;  in dp83867_config()
224 		ret = dp83867_of_init(phydev);  in dp83867_config()
228 		dp83867 = (struct dp83867_private *)phydev->priv;  in dp83867_config()
232 	val = phy_read(phydev, MDIO_DEVAD_NONE, DP83867_CTRL);  in dp83867_config()
233 	phy_write(phydev, MDIO_DEVAD_NONE, DP83867_CTRL,  in dp83867_config()
236 	if (phy_interface_is_rgmii(phydev)) {  in dp83867_config()
237 		ret = phy_write(phydev, MDIO_DEVAD_NONE, MII_DP83867_PHYCTRL,  in dp83867_config()
242 	} else if (phy_interface_is_sgmii(phydev)) {  in dp83867_config()
243 		phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR,  in dp83867_config()
246 		cfg2 = phy_read(phydev, phydev->addr, MII_DP83867_CFG2);  in dp83867_config()
253 		phy_write(phydev, MDIO_DEVAD_NONE, MII_DP83867_CFG2, cfg2);  in dp83867_config()
255 		phy_write_mmd_indirect(phydev, DP83867_RGMIICTL,  in dp83867_config()
256 				       DP83867_DEVADDR, phydev->addr, 0x0);  in dp83867_config()
258 		phy_write(phydev, MDIO_DEVAD_NONE, MII_DP83867_PHYCTRL,  in dp83867_config()
264 		phy_write(phydev, MDIO_DEVAD_NONE, MII_DP83867_BISCR, 0x0);  in dp83867_config()
267 	if (phy_interface_is_rgmii(phydev)) {  in dp83867_config()
268 		val = phy_read_mmd_indirect(phydev, DP83867_RGMIICTL,  in dp83867_config()
269 					    DP83867_DEVADDR, phydev->addr);  in dp83867_config()
271 		if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)  in dp83867_config()
275 		if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)  in dp83867_config()
278 		if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)  in dp83867_config()
281 		phy_write_mmd_indirect(phydev, DP83867_RGMIICTL,  in dp83867_config()
282 				       DP83867_DEVADDR, phydev->addr, val);  in dp83867_config()
287 		phy_write_mmd_indirect(phydev, DP83867_RGMIIDCTL,  in dp83867_config()
288 				       DP83867_DEVADDR, phydev->addr, delay);  in dp83867_config()
291 			val = phy_read_mmd_indirect(phydev,  in dp83867_config()
294 						    phydev->addr);  in dp83867_config()
298 			phy_write_mmd_indirect(phydev, DP83867_IO_MUX_CFG,  in dp83867_config()
299 					       DP83867_DEVADDR, phydev->addr,  in dp83867_config()
304 	genphy_config_aneg(phydev);  in dp83867_config()