20 static int ar8021_config(struct phy_device *phydev)  in ar8021_config()  argument
22 	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);  in ar8021_config()
23 	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, 0x3D47);  in ar8021_config()
25 	phydev->supported = phydev->drv->features;  in ar8021_config()
29 static int ar8031_config(struct phy_device *phydev)  in ar8031_config()  argument
31 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID ||  in ar8031_config()
32 	    phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {  in ar8031_config()
33 		phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_ADDR_REG,  in ar8031_config()
35 		phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_DATA_REG,  in ar8031_config()
39 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID ||  in ar8031_config()
40 	    phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {  in ar8031_config()
41 		phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_ADDR_REG,  in ar8031_config()
43 		phy_write(phydev, MDIO_DEVAD_NONE, AR803x_PHY_DEBUG_DATA_REG,  in ar8031_config()
47 	phydev->supported = phydev->drv->features;  in ar8031_config()
49 	genphy_config_aneg(phydev);  in ar8031_config()
50 	genphy_restart_aneg(phydev);  in ar8031_config()
55 static int ar8035_config(struct phy_device *phydev)  in ar8035_config()  argument
59 	phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x0007);  in ar8035_config()
60 	phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016);  in ar8035_config()
61 	phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007);  in ar8035_config()
62 	regval = phy_read(phydev, MDIO_DEVAD_NONE, 0xe);  in ar8035_config()
63 	phy_write(phydev, MDIO_DEVAD_NONE, 0xe, (regval|0x0018));  in ar8035_config()
65 	phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05);  in ar8035_config()
66 	regval = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e);  in ar8035_config()
67 	phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, (regval|0x0100));  in ar8035_config()
69 	if ((phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ||  in ar8035_config()
70 	    (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)) {  in ar8035_config()
72 		phy_write(phydev, MDIO_DEVAD_NONE, 0x1D, 0x5);  in ar8035_config()
74 		phy_write(phydev, MDIO_DEVAD_NONE, 0x1E, 0x0100);  in ar8035_config()
77 	if ((phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ||  in ar8035_config()
78 	    (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)) {  in ar8035_config()
80 		phy_write(phydev, MDIO_DEVAD_NONE, 0x1D, 0x0);  in ar8035_config()
82 		phy_write(phydev, MDIO_DEVAD_NONE, 0x1E, 0x8000);  in ar8035_config()
85 	phydev->supported = phydev->drv->features;  in ar8035_config()
87 	genphy_config_aneg(phydev);  in ar8035_config()
88 	genphy_restart_aneg(phydev);  in ar8035_config()