91 	iowrite32(data, denali->host + addr);  in denali_direct_write()
102 	iowrite32(addr, denali->host + DENALI_INDEXED_CTRL);  in denali_indexed_read()
109 	iowrite32(addr, denali->host + DENALI_INDEXED_CTRL);  in denali_indexed_write()
110 	iowrite32(data, denali->host + DENALI_INDEXED_DATA);  in denali_indexed_write()
133 		iowrite32(U32_MAX, denali->reg + INTR_EN(i));  in denali_enable_irq()
134 	iowrite32(GLOBAL_INT_EN_FLAG, denali->reg + GLOBAL_INT_ENABLE);  in denali_enable_irq()
142 		iowrite32(0, denali->reg + INTR_EN(i));  in denali_disable_irq()
143 	iowrite32(0, denali->reg + GLOBAL_INT_ENABLE);  in denali_disable_irq()
150 	iowrite32(irq_status, denali->reg + INTR_STATUS(bank));  in denali_clear_irq()
590 	iowrite32(DMA_ENABLE__FLAG, denali->reg + DMA_ENABLE);  in denali_dma_xfer()
607 	iowrite32(0, denali->reg + DMA_ENABLE);  in denali_dma_xfer()
620 	iowrite32(raw ? 0 : ECC_ENABLE__FLAG, denali->reg + ECC_ENABLE);  in denali_data_xfer()
621 	iowrite32(raw ? TRANSFER_SPARE_REG__FLAG : 0,  in denali_data_xfer()
982 	iowrite32(tmp, denali->reg + ACC_CLKS);  in denali_setup_data_interface()
991 	iowrite32(tmp, denali->reg + RE_2_WE);  in denali_setup_data_interface()
1000 	iowrite32(tmp, denali->reg + RE_2_RE);  in denali_setup_data_interface()
1014 	iowrite32(tmp, denali->reg + TWHR2_AND_WE_2_RE);  in denali_setup_data_interface()
1029 	iowrite32(tmp, denali->reg + TCWAW_AND_ADDR_2_DATA);  in denali_setup_data_interface()
1039 	iowrite32(tmp, denali->reg + RDWR_EN_HI_CNT);  in denali_setup_data_interface()
1052 	iowrite32(tmp, denali->reg + RDWR_EN_LO_CNT);  in denali_setup_data_interface()
1063 	iowrite32(tmp, denali->reg + CS_SETUP_CNT);  in denali_setup_data_interface()
1078 		iowrite32(DEVICE_RESET__BANK(i),  in denali_reset_banks()
1105 	iowrite32(denali->oob_skip_bytes, denali->reg + SPARE_AREA_SKIP_BYTES);  in denali_hw_init()
1107 	iowrite32(0x0F, denali->reg + RB_PIN_ENABLED);  in denali_hw_init()
1108 	iowrite32(CHIP_EN_DONT_CARE__FLAG, denali->reg + CHIP_ENABLE_DONT_CARE);  in denali_hw_init()
1110 	iowrite32(0xffff, denali->reg + SPARE_AREA_MARKER);  in denali_hw_init()
1204 		iowrite32(1, denali->reg + DEVICES_CONNECTED);  in denali_multidev_fixup()
1310 	iowrite32(FIELD_PREP(ECC_CORRECTION__ERASE_THRESHOLD, 1) |  in denali_init()
1313 	iowrite32(mtd->erasesize / mtd->writesize,  in denali_init()
1315 	iowrite32(chip->options & NAND_BUSWIDTH_16 ? 1 : 0,  in denali_init()
1317 	iowrite32(chip->options & NAND_ROW_ADDR_3 ? 0 : TWO_ROW_ADDR_CYCLES__FLAG,  in denali_init()
1319 	iowrite32(mtd->writesize, denali->reg + DEVICE_MAIN_AREA_SIZE);  in denali_init()
1320 	iowrite32(mtd->oobsize, denali->reg + DEVICE_SPARE_AREA_SIZE);  in denali_init()
1322 	iowrite32(chip->ecc.size, denali->reg + CFG_DATA_BLOCK_SIZE);  in denali_init()
1323 	iowrite32(chip->ecc.size, denali->reg + CFG_LAST_DATA_BLOCK_SIZE);  in denali_init()
1325 	iowrite32(mtd->writesize / chip->ecc.size,  in denali_init()