110 	struct sdhci_host host;  member
120 static int xenon_mmc_phy_init(struct sdhci_host *host)  in xenon_mmc_phy_init()  argument
122 	struct xenon_sdhci_priv *priv = host->mmc->priv;  in xenon_mmc_phy_init()
128 	var = sdhci_readl(host, EMMC_PHY_TIMING_ADJUST);  in xenon_mmc_phy_init()
136 	sdhci_writel(host, var, EMMC_PHY_TIMING_ADJUST);  in xenon_mmc_phy_init()
142 		var = sdhci_readl(host, SDHCI_CLOCK_CONTROL);  in xenon_mmc_phy_init()
155 	var = sdhci_readl(host, EMMC_PHY_TIMING_ADJUST);  in xenon_mmc_phy_init()
157 	sdhci_writel(host, var, EMMC_PHY_TIMING_ADJUST);  in xenon_mmc_phy_init()
168 		var = sdhci_readl(host, EMMC_PHY_TIMING_ADJUST);  in xenon_mmc_phy_init()
188 static void armada_3700_soc_pad_voltage_set(struct sdhci_host *host)  in armada_3700_soc_pad_voltage_set()  argument
190 	struct xenon_sdhci_priv *priv = host->mmc->priv;  in armada_3700_soc_pad_voltage_set()
198 static void xenon_mmc_phy_set(struct sdhci_host *host)  in xenon_mmc_phy_set()  argument
200 	struct xenon_sdhci_priv *priv = host->mmc->priv;  in xenon_mmc_phy_set()
204 	var = sdhci_readl(host, EMMC_PHY_PAD_CONTROL);  in xenon_mmc_phy_set()
207 	sdhci_writel(host, var, EMMC_PHY_PAD_CONTROL);  in xenon_mmc_phy_set()
210 	var = sdhci_readl(host, EMMC_PHY_PAD_CONTROL1);  in xenon_mmc_phy_set()
213 	sdhci_writel(host, var, EMMC_PHY_PAD_CONTROL1);  in xenon_mmc_phy_set()
226 		var = sdhci_readl(host, EMMC_PHY_TIMING_ADJUST);  in xenon_mmc_phy_set()
228 		sdhci_writel(host, var, EMMC_PHY_TIMING_ADJUST);  in xenon_mmc_phy_set()
235 	var = sdhci_readl(host, SDHCI_CLOCK_CONTROL);  in xenon_mmc_phy_set()
237 	sdhci_writew(host, var, SDHCI_CLOCK_CONTROL);  in xenon_mmc_phy_set()
239 	var = sdhci_readl(host, EMMC_PHY_FUNC_CONTROL);  in xenon_mmc_phy_set()
240 	if (mmc_card_ddr(host->mmc)) {  in xenon_mmc_phy_set()
246 	sdhci_writel(host, var, EMMC_PHY_FUNC_CONTROL);  in xenon_mmc_phy_set()
249 	var = sdhci_readl(host, SDHCI_CLOCK_CONTROL);  in xenon_mmc_phy_set()
251 	sdhci_writew(host, var, SDHCI_CLOCK_CONTROL);  in xenon_mmc_phy_set()
253 	xenon_mmc_phy_init(host);  in xenon_mmc_phy_set()
257 static void xenon_mmc_set_acg(struct sdhci_host *host, bool enable)  in xenon_mmc_set_acg()  argument
261 	var = sdhci_readl(host, SDHC_SYS_OP_CTRL);  in xenon_mmc_set_acg()
267 	sdhci_writel(host, var, SDHC_SYS_OP_CTRL);  in xenon_mmc_set_acg()
273 static void xenon_mmc_enable_slot(struct sdhci_host *host, u8 slot)  in xenon_mmc_enable_slot()  argument
277 	var = sdhci_readl(host, SDHC_SYS_OP_CTRL);  in xenon_mmc_enable_slot()
279 	sdhci_writel(host, var, SDHC_SYS_OP_CTRL);  in xenon_mmc_enable_slot()
283 static void xenon_mmc_enable_parallel_tran(struct sdhci_host *host, u8 slot)  in xenon_mmc_enable_parallel_tran()  argument
287 	var = sdhci_readl(host, SDHC_SYS_EXT_OP_CTRL);  in xenon_mmc_enable_parallel_tran()
289 	sdhci_writel(host, var, SDHC_SYS_EXT_OP_CTRL);  in xenon_mmc_enable_parallel_tran()
292 static void xenon_mmc_disable_tuning(struct sdhci_host *host, u8 slot)  in xenon_mmc_disable_tuning()  argument
297 	var = sdhci_readl(host, SDHC_SLOT_RETUNING_REQ_CTRL);  in xenon_mmc_disable_tuning()
299 	sdhci_writel(host, var, SDHC_SLOT_RETUNING_REQ_CTRL);  in xenon_mmc_disable_tuning()
302 	var = sdhci_readl(host, SDHCI_SIGNAL_ENABLE);  in xenon_mmc_disable_tuning()
304 	sdhci_writel(host, var, SDHCI_SIGNAL_ENABLE);  in xenon_mmc_disable_tuning()
308 static void xenon_mask_cmd_conflict_err(struct sdhci_host *host)  in xenon_mask_cmd_conflict_err()  argument
312 	reg = sdhci_readl(host, SDHC_SYS_EXT_OP_CTRL);  in xenon_mask_cmd_conflict_err()
314 	sdhci_writel(host, reg, SDHC_SYS_EXT_OP_CTRL);  in xenon_mask_cmd_conflict_err()
318 static void xenon_sdhci_set_ios_post(struct sdhci_host *host)  in xenon_sdhci_set_ios_post()  argument
320 	struct xenon_sdhci_priv *priv = host->mmc->priv;  in xenon_sdhci_set_ios_post()
321 	uint speed = host->mmc->clock;  in xenon_sdhci_set_ios_post()
324 	if ((sdhci_readb(host, SDHCI_POWER_CONTROL) & ~SDHCI_POWER_ON) ==  in xenon_sdhci_set_ios_post()
329 	if (IS_SD(host->mmc)) {  in xenon_sdhci_set_ios_post()
332 			if (mmc_card_ddr(host->mmc))  in xenon_sdhci_set_ios_post()
346 		if (mmc_card_ddr(host->mmc))  in xenon_sdhci_set_ios_post()
355 	xenon_mmc_phy_set(host);  in xenon_sdhci_set_ios_post()
368 	struct sdhci_host *host = dev_get_priv(dev);  in xenon_sdhci_probe()  local
371 	host->mmc = &plat->mmc;  in xenon_sdhci_probe()
372 	host->mmc->priv = host;  in xenon_sdhci_probe()
373 	host->mmc->dev = dev;  in xenon_sdhci_probe()
374 	upriv->mmc = host->mmc;  in xenon_sdhci_probe()
377 	host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_32BIT_DMA_ADDR;  in xenon_sdhci_probe()
383 	xenon_mmc_set_acg(host, false);  in xenon_sdhci_probe()
386 	xenon_mmc_enable_slot(host, XENON_MMC_SLOT_ID_HYPERION);  in xenon_sdhci_probe()
393 		armada_3700_soc_pad_voltage_set(host);  in xenon_sdhci_probe()
395 	host->host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_DDR_52MHz;  in xenon_sdhci_probe()
399 		host->host_caps |= MMC_MODE_8BIT;  in xenon_sdhci_probe()
402 		host->host_caps |= MMC_MODE_4BIT;  in xenon_sdhci_probe()
411 	host->ops = &xenon_sdhci_ops;  in xenon_sdhci_probe()
413 	host->max_clk = XENON_MMC_MAX_CLK;  in xenon_sdhci_probe()
414 	ret = sdhci_setup_cfg(&plat->cfg, host, 0, 0);  in xenon_sdhci_probe()
423 	xenon_mmc_enable_parallel_tran(host, XENON_MMC_SLOT_ID_HYPERION);  in xenon_sdhci_probe()
426 	xenon_mmc_disable_tuning(host, XENON_MMC_SLOT_ID_HYPERION);  in xenon_sdhci_probe()
429 	xenon_mmc_set_acg(host, true);  in xenon_sdhci_probe()
431 	xenon_mask_cmd_conflict_err(host);  in xenon_sdhci_probe()
438 	struct sdhci_host *host = dev_get_priv(dev);  in xenon_sdhci_ofdata_to_platdata()  local
442 	host->name = dev->name;  in xenon_sdhci_ofdata_to_platdata()
443 	host->ioaddr = (void *)devfdt_get_addr(dev);  in xenon_sdhci_ofdata_to_platdata()