23 	struct sh_mmcif_host *host = dev_id;  in sh_mmcif_intr()  local
26 	state = sh_mmcif_read(&host->regs->ce_int);  in sh_mmcif_intr()
27 	state &= sh_mmcif_read(&host->regs->ce_int_mask);  in sh_mmcif_intr()
30 		sh_mmcif_write(~(INT_RBSYE | INT_CRSPE), &host->regs->ce_int);  in sh_mmcif_intr()
31 		sh_mmcif_bitclr(MASK_MRBSYE, &host->regs->ce_int_mask);  in sh_mmcif_intr()
34 		sh_mmcif_write(~INT_CRSPE, &host->regs->ce_int);  in sh_mmcif_intr()
35 		sh_mmcif_bitclr(MASK_MCRSPE, &host->regs->ce_int_mask);  in sh_mmcif_intr()
37 		if (sh_mmcif_read(&host->regs->ce_cmd_set) & CMD_SET_RBSY)  in sh_mmcif_intr()
41 		sh_mmcif_write(~INT_BUFREN, &host->regs->ce_int);  in sh_mmcif_intr()
42 		sh_mmcif_bitclr(MASK_MBUFREN, &host->regs->ce_int_mask);  in sh_mmcif_intr()
45 		sh_mmcif_write(~INT_BUFWEN, &host->regs->ce_int);  in sh_mmcif_intr()
46 		sh_mmcif_bitclr(MASK_MBUFWEN, &host->regs->ce_int_mask);  in sh_mmcif_intr()
50 				  INT_BUFRE), &host->regs->ce_int);  in sh_mmcif_intr()
51 		sh_mmcif_bitclr(MASK_MCMD12DRE, &host->regs->ce_int_mask);  in sh_mmcif_intr()
54 		sh_mmcif_write(~INT_BUFRE, &host->regs->ce_int);  in sh_mmcif_intr()
55 		sh_mmcif_bitclr(MASK_MBUFRE, &host->regs->ce_int_mask);  in sh_mmcif_intr()
58 		sh_mmcif_write(~INT_DTRANE, &host->regs->ce_int);  in sh_mmcif_intr()
59 		sh_mmcif_bitclr(MASK_MDTRANE, &host->regs->ce_int_mask);  in sh_mmcif_intr()
63 				&host->regs->ce_int);  in sh_mmcif_intr()
64 		sh_mmcif_bitclr(MASK_MCMD12RBE, &host->regs->ce_int_mask);  in sh_mmcif_intr()
68 		sh_mmcif_write(~state, &host->regs->ce_int);  in sh_mmcif_intr()
69 		sh_mmcif_bitclr(state, &host->regs->ce_int_mask);  in sh_mmcif_intr()
75 	host->sd_error = 1;  in sh_mmcif_intr()
78 	host->wait_int = 1;  in sh_mmcif_intr()
82 static int mmcif_wait_interrupt_flag(struct sh_mmcif_host *host)  in mmcif_wait_interrupt_flag()  argument
93 		if (!sh_mmcif_intr(host))  in mmcif_wait_interrupt_flag()
102 static void sh_mmcif_clock_control(struct sh_mmcif_host *host, unsigned int clk)  in sh_mmcif_clock_control()  argument
104 	sh_mmcif_bitclr(CLK_ENABLE, &host->regs->ce_clk_ctrl);  in sh_mmcif_clock_control()
105 	sh_mmcif_bitclr(CLK_CLEAR, &host->regs->ce_clk_ctrl);  in sh_mmcif_clock_control()
111 		sh_mmcif_bitset(CLK_PCLK, &host->regs->ce_clk_ctrl);  in sh_mmcif_clock_control()
113 		sh_mmcif_bitset((fls(DIV_ROUND_UP(host->clk,  in sh_mmcif_clock_control()
115 				&host->regs->ce_clk_ctrl);  in sh_mmcif_clock_control()
116 	sh_mmcif_bitset(CLK_ENABLE, &host->regs->ce_clk_ctrl);  in sh_mmcif_clock_control()
119 static void sh_mmcif_sync_reset(struct sh_mmcif_host *host)  in sh_mmcif_sync_reset()  argument
123 	tmp = sh_mmcif_read(&host->regs->ce_clk_ctrl) & (CLK_ENABLE |  in sh_mmcif_sync_reset()
126 	sh_mmcif_write(SOFT_RST_ON, &host->regs->ce_version);  in sh_mmcif_sync_reset()
127 	sh_mmcif_write(SOFT_RST_OFF, &host->regs->ce_version);  in sh_mmcif_sync_reset()
129 			&host->regs->ce_clk_ctrl);  in sh_mmcif_sync_reset()
131 	sh_mmcif_bitset(BUF_ACC_ATYP, &host->regs->ce_buf_acc);  in sh_mmcif_sync_reset()
134 static int sh_mmcif_error_manage(struct sh_mmcif_host *host)  in sh_mmcif_error_manage()  argument
139 	host->sd_error = 0;  in sh_mmcif_error_manage()
140 	host->wait_int = 0;  in sh_mmcif_error_manage()
142 	state1 = sh_mmcif_read(&host->regs->ce_host_sts1);  in sh_mmcif_error_manage()
143 	state2 = sh_mmcif_read(&host->regs->ce_host_sts2);  in sh_mmcif_error_manage()
145 			DRIVER_NAME, sh_mmcif_read(&host->regs->ce_host_sts1));  in sh_mmcif_error_manage()
147 			DRIVER_NAME, sh_mmcif_read(&host->regs->ce_host_sts2));  in sh_mmcif_error_manage()
151 		sh_mmcif_bitset(CMD_CTRL_BREAK, &host->regs->ce_cmd_ctrl);  in sh_mmcif_error_manage()
152 		sh_mmcif_bitset(~CMD_CTRL_BREAK, &host->regs->ce_cmd_ctrl);  in sh_mmcif_error_manage()
160 			if (!(sh_mmcif_read(&host->regs->ce_host_sts1)  in sh_mmcif_error_manage()
164 		sh_mmcif_sync_reset(host);  in sh_mmcif_error_manage()
177 static int sh_mmcif_single_read(struct sh_mmcif_host *host,  in sh_mmcif_single_read()  argument
189 	host->wait_int = 0;  in sh_mmcif_single_read()
192 	sh_mmcif_bitset(MASK_MBUFREN, &host->regs->ce_int_mask);  in sh_mmcif_single_read()
193 	time = mmcif_wait_interrupt_flag(host);  in sh_mmcif_single_read()
194 	if (time == 0 || host->sd_error != 0)  in sh_mmcif_single_read()
195 		return sh_mmcif_error_manage(host);  in sh_mmcif_single_read()
197 	host->wait_int = 0;  in sh_mmcif_single_read()
199 			sh_mmcif_read(&host->regs->ce_block_set)) + 3;  in sh_mmcif_single_read()
201 		*p++ = sh_mmcif_read(&host->regs->ce_data);  in sh_mmcif_single_read()
204 	sh_mmcif_bitset(MASK_MBUFRE, &host->regs->ce_int_mask);  in sh_mmcif_single_read()
205 	time = mmcif_wait_interrupt_flag(host);  in sh_mmcif_single_read()
206 	if (time == 0 || host->sd_error != 0)  in sh_mmcif_single_read()
207 		return sh_mmcif_error_manage(host);  in sh_mmcif_single_read()
209 	host->wait_int = 0;  in sh_mmcif_single_read()
213 static int sh_mmcif_multi_read(struct sh_mmcif_host *host,  in sh_mmcif_multi_read()  argument
225 	host->wait_int = 0;  in sh_mmcif_multi_read()
226 	blocksize = BLOCK_SIZE_MASK & sh_mmcif_read(&host->regs->ce_block_set);  in sh_mmcif_multi_read()
228 		sh_mmcif_bitset(MASK_MBUFREN, &host->regs->ce_int_mask);  in sh_mmcif_multi_read()
229 		time = mmcif_wait_interrupt_flag(host);  in sh_mmcif_multi_read()
230 		if (time == 0 || host->sd_error != 0)  in sh_mmcif_multi_read()
231 			return sh_mmcif_error_manage(host);  in sh_mmcif_multi_read()
233 		host->wait_int = 0;  in sh_mmcif_multi_read()
235 			*p++ = sh_mmcif_read(&host->regs->ce_data);  in sh_mmcif_multi_read()
242 static int sh_mmcif_single_write(struct sh_mmcif_host *host,  in sh_mmcif_single_write()  argument
254 	host->wait_int = 0;  in sh_mmcif_single_write()
255 	sh_mmcif_bitset(MASK_MBUFWEN, &host->regs->ce_int_mask);  in sh_mmcif_single_write()
257 	time = mmcif_wait_interrupt_flag(host);  in sh_mmcif_single_write()
258 	if (time == 0 || host->sd_error != 0)  in sh_mmcif_single_write()
259 		return sh_mmcif_error_manage(host);  in sh_mmcif_single_write()
261 	host->wait_int = 0;  in sh_mmcif_single_write()
263 			sh_mmcif_read(&host->regs->ce_block_set)) + 3;  in sh_mmcif_single_write()
265 		sh_mmcif_write(*p++, &host->regs->ce_data);  in sh_mmcif_single_write()
268 	sh_mmcif_bitset(MASK_MDTRANE, &host->regs->ce_int_mask);  in sh_mmcif_single_write()
270 	time = mmcif_wait_interrupt_flag(host);  in sh_mmcif_single_write()
271 	if (time == 0 || host->sd_error != 0)  in sh_mmcif_single_write()
272 		return sh_mmcif_error_manage(host);  in sh_mmcif_single_write()
274 	host->wait_int = 0;  in sh_mmcif_single_write()
278 static int sh_mmcif_multi_write(struct sh_mmcif_host *host,  in sh_mmcif_multi_write()  argument
290 	host->wait_int = 0;  in sh_mmcif_multi_write()
291 	blocksize = BLOCK_SIZE_MASK & sh_mmcif_read(&host->regs->ce_block_set);  in sh_mmcif_multi_write()
293 		sh_mmcif_bitset(MASK_MBUFWEN, &host->regs->ce_int_mask);  in sh_mmcif_multi_write()
295 		time = mmcif_wait_interrupt_flag(host);  in sh_mmcif_multi_write()
297 		if (time == 0 || host->sd_error != 0)  in sh_mmcif_multi_write()
298 			return sh_mmcif_error_manage(host);  in sh_mmcif_multi_write()
300 		host->wait_int = 0;  in sh_mmcif_multi_write()
302 			sh_mmcif_write(*p++, &host->regs->ce_data);  in sh_mmcif_multi_write()
309 static void sh_mmcif_get_response(struct sh_mmcif_host *host,  in sh_mmcif_get_response()  argument
313 		cmd->response[0] = sh_mmcif_read(&host->regs->ce_resp3);  in sh_mmcif_get_response()
314 		cmd->response[1] = sh_mmcif_read(&host->regs->ce_resp2);  in sh_mmcif_get_response()
315 		cmd->response[2] = sh_mmcif_read(&host->regs->ce_resp1);  in sh_mmcif_get_response()
316 		cmd->response[3] = sh_mmcif_read(&host->regs->ce_resp0);  in sh_mmcif_get_response()
320 		cmd->response[0] = sh_mmcif_read(&host->regs->ce_resp0);  in sh_mmcif_get_response()
324 static void sh_mmcif_get_cmd12response(struct sh_mmcif_host *host,  in sh_mmcif_get_cmd12response()  argument
327 	cmd->response[0] = sh_mmcif_read(&host->regs->ce_resp_cmd12);  in sh_mmcif_get_cmd12response()
330 static u32 sh_mmcif_set_cmd(struct sh_mmcif_host *host,  in sh_mmcif_set_cmd()  argument
359 	if (host->data) {  in sh_mmcif_set_cmd()
361 		switch (host->bus_width) {  in sh_mmcif_set_cmd()
384 		sh_mmcif_bitset(data->blocks << 16, &host->regs->ce_block_set);  in sh_mmcif_set_cmd()
401 static u32 sh_mmcif_data_trans(struct sh_mmcif_host *host,  in sh_mmcif_data_trans()  argument
408 		ret = sh_mmcif_multi_read(host, data);  in sh_mmcif_data_trans()
411 		ret = sh_mmcif_multi_write(host, data);  in sh_mmcif_data_trans()
414 		ret = sh_mmcif_single_write(host, data);  in sh_mmcif_data_trans()
418 		ret = sh_mmcif_single_read(host, data);  in sh_mmcif_data_trans()
428 static int sh_mmcif_start_cmd(struct sh_mmcif_host *host,  in sh_mmcif_start_cmd()  argument
437 		if (host->last_cmd == MMC_CMD_READ_MULTIPLE_BLOCK)  in sh_mmcif_start_cmd()
439 					&host->regs->ce_int_mask);  in sh_mmcif_start_cmd()
442 					&host->regs->ce_int_mask);  in sh_mmcif_start_cmd()
444 		time = mmcif_wait_interrupt_flag(host);  in sh_mmcif_start_cmd()
445 		if (time == 0 || host->sd_error != 0)  in sh_mmcif_start_cmd()
446 			return sh_mmcif_error_manage(host);  in sh_mmcif_start_cmd()
448 		sh_mmcif_get_cmd12response(host, cmd);  in sh_mmcif_start_cmd()
461 	if (host->data) {  in sh_mmcif_start_cmd()
462 		sh_mmcif_write(0, &host->regs->ce_block_set);  in sh_mmcif_start_cmd()
463 		sh_mmcif_write(data->blocksize, &host->regs->ce_block_set);  in sh_mmcif_start_cmd()
465 	opc = sh_mmcif_set_cmd(host, data, cmd);  in sh_mmcif_start_cmd()
467 	sh_mmcif_write(INT_START_MAGIC, &host->regs->ce_int);  in sh_mmcif_start_cmd()
468 	sh_mmcif_write(mask, &host->regs->ce_int_mask);  in sh_mmcif_start_cmd()
472 	sh_mmcif_write(cmd->cmdarg, &host->regs->ce_arg);  in sh_mmcif_start_cmd()
473 	host->wait_int = 0;  in sh_mmcif_start_cmd()
475 	sh_mmcif_write(opc, &host->regs->ce_cmd_set);  in sh_mmcif_start_cmd()
477 	time = mmcif_wait_interrupt_flag(host);  in sh_mmcif_start_cmd()
479 		return sh_mmcif_error_manage(host);  in sh_mmcif_start_cmd()
481 	if (host->sd_error) {  in sh_mmcif_start_cmd()
490 			ret = sh_mmcif_error_manage(host);  in sh_mmcif_start_cmd()
493 		host->sd_error = 0;  in sh_mmcif_start_cmd()
494 		host->wait_int = 0;  in sh_mmcif_start_cmd()
502 	if (host->wait_int == 1) {  in sh_mmcif_start_cmd()
503 		sh_mmcif_get_response(host, cmd);  in sh_mmcif_start_cmd()
504 		host->wait_int = 0;  in sh_mmcif_start_cmd()
506 	if (host->data)  in sh_mmcif_start_cmd()
507 		ret = sh_mmcif_data_trans(host, data, cmd->cmdidx);  in sh_mmcif_start_cmd()
508 	host->last_cmd = cmd->cmdidx;  in sh_mmcif_start_cmd()
516 	struct sh_mmcif_host *host = mmc->priv;  in sh_mmcif_request()  local
534 	host->sd_error = 0;  in sh_mmcif_request()
535 	host->data = data;  in sh_mmcif_request()
536 	ret = sh_mmcif_start_cmd(host, data, cmd);  in sh_mmcif_request()
537 	host->data = NULL;  in sh_mmcif_request()
544 	struct sh_mmcif_host *host = mmc->priv;  in sh_mmcif_set_ios()  local
547 		sh_mmcif_clock_control(host, mmc->clock);  in sh_mmcif_set_ios()
550 		host->bus_width = MMC_BUS_WIDTH_8;  in sh_mmcif_set_ios()
552 		host->bus_width = MMC_BUS_WIDTH_4;  in sh_mmcif_set_ios()
554 		host->bus_width = MMC_BUS_WIDTH_1;  in sh_mmcif_set_ios()
563 	struct sh_mmcif_host *host = mmc->priv;  in sh_mmcif_init()  local
565 	sh_mmcif_sync_reset(host);  in sh_mmcif_init()
566 	sh_mmcif_write(MASK_ALL, &host->regs->ce_int_mask);  in sh_mmcif_init()
588 	struct sh_mmcif_host *host = NULL;  in mmcif_mmc_init()  local
590 	host = malloc(sizeof(struct sh_mmcif_host));  in mmcif_mmc_init()
591 	if (!host)  in mmcif_mmc_init()
593 	memset(host, 0, sizeof(*host));  in mmcif_mmc_init()
595 	host->regs = (struct sh_mmcif_regs *)CONFIG_SH_MMCIF_ADDR;  in mmcif_mmc_init()
596 	host->clk = CONFIG_SH_MMCIF_CLK;  in mmcif_mmc_init()
598 	sh_mmcif_cfg.f_min = MMC_CLK_DIV_MIN(host->clk);  in mmcif_mmc_init()
599 	sh_mmcif_cfg.f_max = MMC_CLK_DIV_MAX(host->clk);  in mmcif_mmc_init()
601 	mmc = mmc_create(&sh_mmcif_cfg, host);  in mmcif_mmc_init()
603 		free(host);  in mmcif_mmc_init()