Lines Matching refs:host

89 static int dwmci_wait_reset(struct dwmci_host *host, u32 value)  in dwmci_wait_reset()  argument
94 dwmci_writel(host, DWMCI_CTRL, value); in dwmci_wait_reset()
97 ctrl = dwmci_readl(host, DWMCI_CTRL); in dwmci_wait_reset()
115 static void dwmci_prepare_data(struct dwmci_host *host, in dwmci_prepare_data() argument
127 dwmci_wait_reset(host, DWMCI_CTRL_FIFO_RESET); in dwmci_prepare_data()
130 dwmci_writel(host, DWMCI_DBADDR, (ulong)cur_idmac); in dwmci_prepare_data()
154 ctrl = dwmci_readl(host, DWMCI_CTRL); in dwmci_prepare_data()
156 dwmci_writel(host, DWMCI_CTRL, ctrl); in dwmci_prepare_data()
158 ctrl = dwmci_readl(host, DWMCI_BMOD); in dwmci_prepare_data()
160 dwmci_writel(host, DWMCI_BMOD, ctrl); in dwmci_prepare_data()
162 dwmci_writel(host, DWMCI_BLKSIZ, data->blocksize); in dwmci_prepare_data()
163 dwmci_writel(host, DWMCI_BYTCNT, data->blocksize * data->blocks); in dwmci_prepare_data()
166 static unsigned int dwmci_get_drto(struct dwmci_host *host, in dwmci_get_drto() argument
172 timeout /= host->mmc->bus_width; in dwmci_get_drto()
174 timeout /= (host->mmc->clock / 1000); /* counting in msec */ in dwmci_get_drto()
180 static unsigned int dwmci_get_cto(struct dwmci_host *host) in dwmci_get_cto() argument
186 cto_clks = dwmci_readl(host, DWMCI_TMOUT) & 0xff; in dwmci_get_cto()
187 cto_div = (dwmci_readl(host, DWMCI_CLKDIV) & 0xff) * 2; in dwmci_get_cto()
192 host->mmc->clock); in dwmci_get_cto()
200 static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) in dwmci_data_transfer() argument
207 u32 fifo_depth = (((host->fifoth_val & RX_WMARK_MASK) >> in dwmci_data_transfer()
213 stride = host->stride_pio && size > 128; in dwmci_data_transfer()
219 timeout = dwmci_get_drto(host, size); in dwmci_data_transfer()
221 if ((dwmci_readl(host, DWMCI_CMD) & 0x1F) == MMC_SEND_TUNING_BLOCK_HS200) in dwmci_data_transfer()
227 mask = dwmci_readl(host, DWMCI_RINTSTS); in dwmci_data_transfer()
236 dwmci_wait_reset(host, DWMCI_RESET_ALL); in dwmci_data_transfer()
237 dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_PRV_DAT_WAIT | in dwmci_data_transfer()
241 status = dwmci_readl(host, DWMCI_CMD); in dwmci_data_transfer()
247 if (!host->fifo_mode) { in dwmci_data_transfer()
248 ctrl = dwmci_readl(host, DWMCI_BMOD); in dwmci_data_transfer()
250 dwmci_writel(host, DWMCI_BMOD, ctrl); in dwmci_data_transfer()
257 if (host->fifo_mode && size) { in dwmci_data_transfer()
262 len = dwmci_readl(host, DWMCI_STATUS); in dwmci_data_transfer()
269 *buf++ = dwmci_readl(host, DWMCI_DATA); in dwmci_data_transfer()
278 dwmci_memcpy_fromio(buf, host->ioaddr + DWMCI_DATA); in dwmci_data_transfer()
287 dwmci_writel(host, DWMCI_RINTSTS, in dwmci_data_transfer()
292 len = dwmci_readl(host, DWMCI_STATUS); in dwmci_data_transfer()
299 dwmci_writel(host, DWMCI_DATA, in dwmci_data_transfer()
308 dwmci_memcpy_toio(buf, host->ioaddr + DWMCI_DATA); in dwmci_data_transfer()
316 dwmci_writel(host, DWMCI_RINTSTS, in dwmci_data_transfer()
336 dwmci_writel(host, DWMCI_RINTSTS, mask); in dwmci_data_transfer()
341 static int dwmci_set_transfer_mode(struct dwmci_host *host, in dwmci_set_transfer_mode() argument
363 struct dwmci_host *host = mmc->priv; local
372 while (dwmci_readl(host, DWMCI_STATUS) & DWMCI_BUSY) {
379 dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL);
382 if (host->fifo_mode) {
383 dwmci_writel(host, DWMCI_BLKSIZ, data->blocksize);
384 dwmci_writel(host, DWMCI_BYTCNT,
386 dwmci_wait_reset(host, DWMCI_CTRL_FIFO_RESET);
403 dwmci_prepare_data(host, data, cur_idmac,
408 dwmci_writel(host, DWMCI_CMDARG, cmd->cmdarg);
411 flags = dwmci_set_transfer_mode(host, data);
436 dwmci_writel(host, DWMCI_CMD, flags);
438 timeout = dwmci_get_cto(host);
441 mask = dwmci_readl(host, DWMCI_RINTSTS);
444 dwmci_writel(host, DWMCI_RINTSTS, mask);
473 cmd->response[0] = dwmci_readl(host, DWMCI_RESP3);
474 cmd->response[1] = dwmci_readl(host, DWMCI_RESP2);
475 cmd->response[2] = dwmci_readl(host, DWMCI_RESP1);
476 cmd->response[3] = dwmci_readl(host, DWMCI_RESP0);
478 cmd->response[0] = dwmci_readl(host, DWMCI_RESP0);
483 ret = dwmci_data_transfer(host, data);
486 if (!host->fifo_mode) {
487 ctrl = dwmci_readl(host, DWMCI_CTRL);
489 dwmci_writel(host, DWMCI_CTRL, ctrl);
508 struct dwmci_host *host = mmc->priv; local
528 while (dwmci_readl(host, DWMCI_STATUS) & DWMCI_BUSY) {
535 dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_ALL);
538 if (host->fifo_mode) {
539 dwmci_writel(host, DWMCI_BLKSIZ, data->blocksize);
540 dwmci_writel(host, DWMCI_BYTCNT,
542 dwmci_wait_reset(host, DWMCI_CTRL_FIFO_RESET);
553 dwmci_prepare_data(host, data, cur_idmac,
558 dwmci_writel(host, DWMCI_CMDARG, cmd->cmdarg);
561 flags = dwmci_set_transfer_mode(host, data);
584 dwmci_writel(host, DWMCI_CMD, flags);
586 timeout = dwmci_get_cto(host);
589 mask = dwmci_readl(host, DWMCI_RINTSTS);
592 dwmci_writel(host, DWMCI_RINTSTS, mask);
620 cmd->response[0] = dwmci_readl(host, DWMCI_RESP3);
621 cmd->response[1] = dwmci_readl(host, DWMCI_RESP2);
622 cmd->response[2] = dwmci_readl(host, DWMCI_RESP1);
623 cmd->response[3] = dwmci_readl(host, DWMCI_RESP0);
625 cmd->response[0] = dwmci_readl(host, DWMCI_RESP0);
633 static int dwmci_setup_bus(struct dwmci_host *host, u32 freq) argument
646 if (host->get_mmc_clk)
647 sclk = host->get_mmc_clk(host, freq);
648 else if (host->bus_hz)
649 sclk = host->bus_hz;
663 dwmci_writel(host, DWMCI_CLKENA, 0);
664 dwmci_writel(host, DWMCI_CLKSRC, 0);
666 dwmci_writel(host, DWMCI_CLKDIV, div);
667 dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_PRV_DAT_WAIT |
671 status = dwmci_readl(host, DWMCI_CMD);
678 dwmci_writel(host, DWMCI_CLKENA, DWMCI_CLKEN_ENABLE |
681 dwmci_writel(host, DWMCI_CMD, DWMCI_CMD_PRV_DAT_WAIT |
686 status = dwmci_readl(host, DWMCI_CMD);
693 host->clock = freq;
707 struct dwmci_host *host = (struct dwmci_host *)mmc->priv; local
713 status = dwmci_readl(host, DWMCI_STATUS);
726 struct dwmci_host *host = (struct dwmci_host *)mmc->priv; local
728 if (!host->execute_tuning)
731 return host->execute_tuning(host, opcode);
742 struct dwmci_host *host = (struct dwmci_host *)mmc->priv; local
747 dwmci_setup_bus(host, mmc->clock);
760 dwmci_writel(host, DWMCI_CTYPE, ctype);
762 regs = dwmci_readl(host, DWMCI_UHS_REG);
768 dwmci_writel(host, DWMCI_UHS_REG, regs);
770 if (host->clksel)
771 host->clksel(host);
778 struct dwmci_host *host = mmc->priv; local
798 if (host->board_init)
799 host->board_init(host);
801 if (host->dev_index == 0)
802 dwmci_writel(host, DWMCI_PWREN, 1);
803 else if (host->dev_index == 1)
804 dwmci_writel(host, DWMCI_PWREN, CONFIG_MMC_DW_PWREN_VALUE);
806 dwmci_writel(host, DWMCI_PWREN, 1);
808 dwmci_writel(host, DWMCI_PWREN, 1);
811 verid = dwmci_readl(host, DWMCI_VERID) & 0x0000ffff;
813 dwmci_writel(host, DWMCI_CARDTHRCTL, DWMCI_CDTHRCTRL_CONFIG);
815 if (!dwmci_wait_reset(host, DWMCI_RESET_ALL)) {
820 use_dma = SDMMC_GET_TRANS_MODE(dwmci_readl(host, DWMCI_HCON));
822 host->fifo_mode = 0;
824 host->fifo_mode = 1;
828 dwmci_setup_bus(host, mmc->cfg->f_min);
830 dwmci_writel(host, DWMCI_RINTSTS, 0xFFFFFFFF);
831 dwmci_writel(host, DWMCI_INTMASK, 0);
833 dwmci_writel(host, DWMCI_TMOUT, 0xFFFFFFFF);
835 dwmci_writel(host, DWMCI_IDINTEN, 0);
836 dwmci_writel(host, DWMCI_BMOD, 1);
838 if (!host->fifoth_val) {
841 fifo_size = dwmci_readl(host, DWMCI_FIFOTH);
843 host->fifoth_val = MSIZE(DWMCI_MSIZE) |
847 dwmci_writel(host, DWMCI_FIFOTH, host->fifoth_val);
849 dwmci_writel(host, DWMCI_CLKENA, 0);
850 dwmci_writel(host, DWMCI_CLKSRC, 0);
859 struct dwmci_host *host = mmc->priv; local
874 ret = (dwmci_readl(host, DWMCI_CDETECT) & (1 << 0)) == 0 ? 1 : 0;
909 void dwmci_setup_cfg(struct mmc_config *cfg, struct dwmci_host *host, argument
912 cfg->name = host->name;
921 cfg->host_caps = host->caps;
923 switch (host->buswidth) {
936 printf("Unsupported bus width: %d\n", host->buswidth);
950 int add_dwmci(struct dwmci_host *host, u32 max_clk, u32 min_clk) argument
952 dwmci_setup_cfg(&host->cfg, host, max_clk, min_clk);
954 host->mmc = mmc_create(&host->cfg, host);
955 if (host->mmc == NULL)