119 static unsigned int set_i2c_bus_speed(const struct fsl_i2c_base *base,  in set_i2c_bus_speed()  argument
180 	writeb(dfsr, &base->dfsrr);	/* set default filter */  in set_i2c_bus_speed()
181 	writeb(fdr, &base->fdr);	/* set bus speed */  in set_i2c_bus_speed()
191 			writeb(fdr, &base->fdr);	/* set bus speed */  in set_i2c_bus_speed()
209 static int fsl_i2c_fixup(const struct fsl_i2c_base *base)  in fsl_i2c_fixup()  argument
223 	writeb(I2C_CR_MEN | I2C_CR_MSTA, &base->cr);  in fsl_i2c_fixup()
226 	while (!(readb(&base->sr) & I2C_SR_MBB)) {  in fsl_i2c_fixup()
231 	if (readb(&base->sr) & I2C_SR_MAL) {  in fsl_i2c_fixup()
233 		writeb(0, &base->cr);  in fsl_i2c_fixup()
235 		writeb(I2C_CR_MSTA | flags, &base->cr);  in fsl_i2c_fixup()
236 		writeb(I2C_CR_MEN | I2C_CR_MSTA | flags, &base->cr);  in fsl_i2c_fixup()
239 	readb(&base->dr);  in fsl_i2c_fixup()
242 	while (!(readb(&base->sr) & I2C_SR_MIF)) {  in fsl_i2c_fixup()
249 	writeb(I2C_CR_MEN | flags, &base->cr);  in fsl_i2c_fixup()
250 	writeb(0, &base->sr);  in fsl_i2c_fixup()
256 static void __i2c_init(const struct fsl_i2c_base *base, int speed, int  in __i2c_init()  argument
269 	writeb(0, &base->cr);		/* stop I2C controller */  in __i2c_init()
271 	set_i2c_bus_speed(base, i2c_clk, speed);  in __i2c_init()
272 	writeb(slaveadd << 1, &base->adr);/* write slave address */  in __i2c_init()
273 	writeb(0x0, &base->sr);		/* clear status register */  in __i2c_init()
274 	writeb(I2C_CR_MEN, &base->cr);	/* start I2C controller */  in __i2c_init()
277 	while (readb(&base->sr) & I2C_SR_MBB) {  in __i2c_init()
281 		if (fsl_i2c_fixup(base))  in __i2c_init()
290 i2c_wait4bus(const struct fsl_i2c_base *base)  in i2c_wait4bus()  argument
295 	while (readb(&base->sr) & I2C_SR_MBB) {  in i2c_wait4bus()
304 i2c_wait(const struct fsl_i2c_base *base, int write)  in i2c_wait()  argument
311 		csr = readb(&base->sr);  in i2c_wait()
315 		csr = readb(&base->sr);  in i2c_wait()
317 		writeb(0x0, &base->sr);  in i2c_wait()
342 i2c_write_addr(const struct fsl_i2c_base *base, u8 dev, u8 dir, int rsta)  in i2c_write_addr()  argument
346 	       &base->cr);  in i2c_write_addr()
348 	writeb((dev << 1) | dir, &base->dr);  in i2c_write_addr()
350 	if (i2c_wait(base, I2C_WRITE_BIT) < 0)  in i2c_write_addr()
357 __i2c_write_data(const struct fsl_i2c_base *base, u8 *data, int length)  in __i2c_write_data()  argument
362 		writeb(data[i], &base->dr);  in __i2c_write_data()
364 		if (i2c_wait(base, I2C_WRITE_BIT) < 0)  in __i2c_write_data()
372 __i2c_read_data(const struct fsl_i2c_base *base, u8 *data, int length)  in __i2c_read_data()  argument
377 	       &base->cr);  in __i2c_read_data()
380 	readb(&base->dr);  in __i2c_read_data()
383 		if (i2c_wait(base, I2C_READ_BIT) < 0)  in __i2c_read_data()
389 			       &base->cr);  in __i2c_read_data()
394 			       &base->cr);  in __i2c_read_data()
396 		data[i] = readb(&base->dr);  in __i2c_read_data()
403 __i2c_read(const struct fsl_i2c_base *base, u8 chip_addr, u8 *offset, int olen,  in __i2c_read()  argument
408 	if (i2c_wait4bus(base) < 0)  in __i2c_read()
419 		if (i2c_write_addr(base, chip_addr, I2C_WRITE_BIT, 0) != 0)  in __i2c_read()
420 			ret = __i2c_write_data(base, data, -olen);  in __i2c_read()
425 		if (dlen && i2c_write_addr(base, chip_addr,  in __i2c_read()
427 			ret = __i2c_read_data(base, data, dlen);  in __i2c_read()
430 		    i2c_write_addr(base, chip_addr, I2C_WRITE_BIT, 0) != 0  &&  in __i2c_read()
431 		    __i2c_write_data(base, offset, olen) == olen)  in __i2c_read()
434 		if (dlen && i2c_write_addr(base, chip_addr, I2C_READ_BIT,  in __i2c_read()
436 			ret = __i2c_read_data(base, data, dlen);  in __i2c_read()
439 	writeb(I2C_CR_MEN, &base->cr);  in __i2c_read()
441 	if (i2c_wait4bus(base)) /* Wait until STOP */  in __i2c_read()
451 __i2c_write(const struct fsl_i2c_base *base, u8 chip_addr, u8 *offset, int olen,  in __i2c_write()  argument
456 	if (i2c_wait4bus(base) < 0)  in __i2c_write()
459 	if (i2c_write_addr(base, chip_addr, I2C_WRITE_BIT, 0) != 0 &&  in __i2c_write()
460 	    __i2c_write_data(base, offset, olen) == olen) {  in __i2c_write()
461 		ret = __i2c_write_data(base, data, dlen);  in __i2c_write()
464 	writeb(I2C_CR_MEN, &base->cr);  in __i2c_write()
465 	if (i2c_wait4bus(base)) /* Wait until STOP */  in __i2c_write()
475 __i2c_probe_chip(const struct fsl_i2c_base *base, uchar chip)  in __i2c_probe_chip()  argument
481 	if (chip == (readb(&base->adr) >> 1))  in __i2c_probe_chip()
484 	return __i2c_read(base, chip, 0, 0, NULL, 0);  in __i2c_probe_chip()
487 static unsigned int __i2c_set_bus_speed(const struct fsl_i2c_base *base,  in __i2c_set_bus_speed()  argument
490 	writeb(0, &base->cr);		/* stop controller */  in __i2c_set_bus_speed()
491 	set_i2c_bus_speed(base, i2c_clk, speed);  in __i2c_set_bus_speed()
492 	writeb(I2C_CR_MEN, &base->cr);	/* start controller */  in __i2c_set_bus_speed()
565 	return __i2c_probe_chip(dev->base, chip_addr);
571 	return __i2c_set_bus_speed(dev->base, speed, dev->i2c_clk);
584 	dev->base = map_sysmem(CONFIG_SYS_IMMR + addr, size);
586 	if (!dev->base)
603 	__i2c_init(dev->base, dev->speed, dev->slaveadd, dev->i2c_clk,
626 		return __i2c_read(dev->base, dmsg->addr, omsg->buf, omsg->len,
629 		return __i2c_write(dev->base, dmsg->addr, omsg->buf, omsg->len,