Lines Matching refs:channel
94 int lpc32xx_dma_start_xfer(unsigned int channel, in lpc32xx_dma_start_xfer() argument
97 if (unlikely(((BIT_MASK(channel) & alloc_ch) == 0) || in lpc32xx_dma_start_xfer()
98 (channel >= DMA_NO_OF_CHANNELS))) { in lpc32xx_dma_start_xfer()
99 pr_err("Request for xfer on unallocated channel %d", channel); in lpc32xx_dma_start_xfer()
102 writel(BIT_MASK(channel), &dma->int_tc_clear); in lpc32xx_dma_start_xfer()
103 writel(BIT_MASK(channel), &dma->int_err_clear); in lpc32xx_dma_start_xfer()
104 writel(desc->dma_src, &dma->dma_chan[channel].src_addr); in lpc32xx_dma_start_xfer()
105 writel(desc->dma_dest, &dma->dma_chan[channel].dest_addr); in lpc32xx_dma_start_xfer()
106 writel(desc->next_lli, &dma->dma_chan[channel].lli); in lpc32xx_dma_start_xfer()
107 writel(desc->next_ctrl, &dma->dma_chan[channel].control); in lpc32xx_dma_start_xfer()
108 writel(config, &dma->dma_chan[channel].config_ch); in lpc32xx_dma_start_xfer()
113 int lpc32xx_dma_wait_status(unsigned int channel) in lpc32xx_dma_wait_status() argument
119 if (unlikely(channel >= DMA_NO_OF_CHANNELS)) { in lpc32xx_dma_wait_status()
120 pr_err("Request for status on unallocated channel %d", channel); in lpc32xx_dma_wait_status()
128 if (reg & BIT_MASK(channel)) in lpc32xx_dma_wait_status()
132 pr_err("DMA status timeout channel %d\n", channel); in lpc32xx_dma_wait_status()
138 if (unlikely(readl(&dma->raw_err_stat) & BIT_MASK(channel))) { in lpc32xx_dma_wait_status()
139 setbits_le32(&dma->int_err_clear, BIT_MASK(channel)); in lpc32xx_dma_wait_status()
140 setbits_le32(&dma->raw_err_stat, BIT_MASK(channel)); in lpc32xx_dma_wait_status()
141 pr_err("DMA error on channel %d\n", channel); in lpc32xx_dma_wait_status()
144 setbits_le32(&dma->int_tc_clear, BIT_MASK(channel)); in lpc32xx_dma_wait_status()
145 setbits_le32(&dma->raw_tc_stat, BIT_MASK(channel)); in lpc32xx_dma_wait_status()