79 		reg_write(REG_DUNIT_CTRL_LOW_ADDR,  in ddr3_write_leveling_hw()
88 	reg_write(REG_DRAM_TRAINING_ADDR, reg);	/* 0x15B0 - Training Register */  in ddr3_write_leveling_hw()
92 	reg_write(REG_DRAM_TRAINING_SHADOW_ADDR, reg);  in ddr3_write_leveling_hw()
165 			reg_write(REG_DUNIT_CTRL_LOW_ADDR, reg);  in ddr3_write_leveling_hw()
224 	reg_write(REG_DRAM_TRAINING_2_ADDR, reg);  in ddr3_wl_supplement()
227 	reg_write(REG_DRAM_TRAINING_ADDR, reg);	/* 0x15B0 - Training Register */  in ddr3_wl_supplement()
259 					reg_write(REG_DRAM_TRAINING_2_ADDR,  in ddr3_wl_supplement()
404 					reg_write(REG_DRAM_TRAINING_2_ADDR,  in ddr3_wl_supplement()
454 	reg_write(REG_DRAM_TRAINING_2_ADDR, reg);  in ddr3_wl_supplement()
458 	reg_write(REG_DRAM_TRAINING_1_ADDR, reg);  in ddr3_wl_supplement()
502 		reg_write(REG_DUNIT_CTRL_LOW_ADDR,  in ddr3_write_leveling_hw_reg_dimm()
511 	reg_write(REG_DRAM_TRAINING_ADDR, reg);	/* 0x15B0 - Training Register */  in ddr3_write_leveling_hw_reg_dimm()
515 	reg_write(REG_DRAM_TRAINING_SHADOW_ADDR, reg);  in ddr3_write_leveling_hw_reg_dimm()
601 			reg_write(REG_DUNIT_CTRL_LOW_ADDR, reg);  in ddr3_write_leveling_hw_reg_dimm()
633 		reg_write(REG_DRAM_TRAINING_ADDR, 0);  in ddr3_write_leveling_hw_reg_dimm()
673 		reg_write(REG_DUNIT_CTRL_LOW_ADDR,  in ddr3_write_leveling_sw()
687 			reg_write(REG_DDR3_MR1_ADDR, reg);  in ddr3_write_leveling_sw()
696 			reg_write(REG_SDRAM_OPERATION_ADDR, reg);  in ddr3_write_leveling_sw()
709 	reg_write(REG_DRAM_TRAINING_2_ADDR, reg);  in ddr3_write_leveling_sw()
717 	reg_write(REG_DRAM_TRAINING_2_ADDR, reg);  in ddr3_write_leveling_sw()
734 				reg_write(REG_SDRAM_OPERATION_ADDR, reg);	/* 0x1418 - SDRAM Operation Register */  in ddr3_write_leveling_sw()
754 			reg_write(REG_DDR3_MR1_ADDR, reg);	/* 0x15D4 - DDR3 MR1 Register */  in ddr3_write_leveling_sw()
763 			reg_write(REG_SDRAM_OPERATION_ADDR, reg);  in ddr3_write_leveling_sw()
787 			reg_write(REG_TRAINING_WL_ADDR, reg);  in ddr3_write_leveling_sw()
807 			reg_write(REG_DDR3_MR1_ADDR, reg);  in ddr3_write_leveling_sw()
816 			reg_write(REG_SDRAM_OPERATION_ADDR, reg);  in ddr3_write_leveling_sw()
827 	reg_write(REG_DRAM_TRAINING_2_ADDR, reg);  in ddr3_write_leveling_sw()
834 	reg_write(REG_DRAM_TRAINING_2_ADDR, reg);  in ddr3_write_leveling_sw()
845 			reg_write(REG_DDR3_MR1_ADDR, reg);  in ddr3_write_leveling_sw()
854 			reg_write(REG_SDRAM_OPERATION_ADDR, reg);  in ddr3_write_leveling_sw()
865 		reg_write(REG_DUNIT_CTRL_LOW_ADDR, reg);  in ddr3_write_leveling_sw()
897 		reg_write(REG_DUNIT_CTRL_LOW_ADDR,  in ddr3_write_leveling_sw_reg_dimm()
922 			reg_write(REG_DDR3_MR1_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
931 			reg_write(REG_SDRAM_OPERATION_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
944 	reg_write(REG_DRAM_TRAINING_2_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
952 	reg_write(REG_DRAM_TRAINING_2_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
968 				reg_write(REG_SDRAM_OPERATION_ADDR, reg);	/* 0x1418 - SDRAM Operation Register */  in ddr3_write_leveling_sw_reg_dimm()
995 			reg_write(REG_DDR3_MR1_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
1004 			reg_write(REG_SDRAM_OPERATION_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
1022 			reg_write(REG_TRAINING_WL_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
1039 			reg_write(REG_DDR3_MR1_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
1048 			reg_write(REG_SDRAM_OPERATION_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
1059 	reg_write(REG_DRAM_TRAINING_2_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
1066 	reg_write(REG_DRAM_TRAINING_2_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
1077 			reg_write(REG_DDR3_MR1_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
1086 			reg_write(REG_SDRAM_OPERATION_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
1097 		reg_write(REG_DUNIT_CTRL_LOW_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
1170 	reg_write(REG_SDRAM_ODT_CTRL_HIGH_ADDR, reg);  in ddr3_write_leveling_single_cs()
1182 	reg_write(REG_TRAINING_WL_ADDR, reg);  in ddr3_write_leveling_single_cs()
1200 	reg_write(REG_TRAINING_WL_ADDR, reg);  in ddr3_write_leveling_single_cs()
1246 			reg_write(REG_TRAINING_WL_ADDR, reg);	/* 0x16AC  */  in ddr3_write_leveling_single_cs()
1331 	reg_write(REG_SDRAM_ODT_CTRL_HIGH_ADDR, reg);  in ddr3_write_leveling_single_cs()
1358 	reg_write(REG_PHY_REGISTRY_FILE_ACCESS_ADDR, reg);	/* 0x16A0 */  in ddr3_write_ctrl_pup_reg()
1360 	reg_write(REG_PHY_REGISTRY_FILE_ACCESS_ADDR, reg);	/* 0x16A0 */  in ddr3_write_ctrl_pup_reg()