76 	reg = reg_read(REG_DUNIT_CTRL_LOW_ADDR);  in ddr3_write_leveling_hw()
90 	reg =  reg_read(REG_DRAM_TRAINING_SHADOW_ADDR) |  in ddr3_write_leveling_hw()
96 		reg = reg_read(REG_DRAM_TRAINING_SHADOW_ADDR) &  in ddr3_write_leveling_hw()
100 	reg = reg_read(REG_DRAM_TRAINING_ADDR);  in ddr3_write_leveling_hw()
163 			reg = reg_read(REG_DUNIT_CTRL_LOW_ADDR) |  in ddr3_write_leveling_hw()
219 	reg = reg_read(REG_DRAM_TRAINING_2_ADDR) |  in ddr3_wl_supplement()
252 					    (reg_read(REG_DRAM_TRAINING_2_ADDR)  in ddr3_wl_supplement()
401 					    (reg_read(REG_DRAM_TRAINING_2_ADDR)  in ddr3_wl_supplement()
451 	reg = reg_read(REG_DRAM_TRAINING_2_ADDR);  in ddr3_wl_supplement()
456 	reg = reg_read(REG_DRAM_TRAINING_1_ADDR) |  in ddr3_wl_supplement()
499 	reg = reg_read(REG_DUNIT_CTRL_LOW_ADDR);  in ddr3_write_leveling_hw_reg_dimm()
513 	reg = reg_read(REG_DRAM_TRAINING_SHADOW_ADDR) |  in ddr3_write_leveling_hw_reg_dimm()
519 		reg = reg_read(REG_DRAM_TRAINING_SHADOW_ADDR) &  in ddr3_write_leveling_hw_reg_dimm()
523 	reg = reg_read(REG_DRAM_TRAINING_ADDR);  in ddr3_write_leveling_hw_reg_dimm()
599 			reg = reg_read(REG_DUNIT_CTRL_LOW_ADDR) |  in ddr3_write_leveling_hw_reg_dimm()
670 	reg = reg_read(REG_DUNIT_CTRL_LOW_ADDR);  in ddr3_write_leveling_sw()
681 			reg = reg_read(REG_DDR3_MR1_ADDR) &  in ddr3_write_leveling_sw()
705 	reg = reg_read(REG_DRAM_TRAINING_2_ADDR) |  in ddr3_write_leveling_sw()
713 	reg = reg_read(REG_DRAM_TRAINING_2_ADDR) &  in ddr3_write_leveling_sw()
738 					    ((reg_read  in ddr3_write_leveling_sw()
746 			reg = reg_read(REG_DDR3_MR1_ADDR) &  in ddr3_write_leveling_sw()
784 			reg = reg_read(REG_TRAINING_WL_ADDR) |  in ddr3_write_leveling_sw()
802 			reg = reg_read(REG_DDR3_MR1_ADDR) &  in ddr3_write_leveling_sw()
824 	reg = reg_read(REG_DRAM_TRAINING_2_ADDR);  in ddr3_write_leveling_sw()
831 	reg = reg_read(REG_DRAM_TRAINING_2_ADDR);  in ddr3_write_leveling_sw()
839 			reg = reg_read(REG_DDR3_MR1_ADDR) &  in ddr3_write_leveling_sw()
863 		reg = reg_read(REG_DUNIT_CTRL_LOW_ADDR) |  in ddr3_write_leveling_sw()
894 	reg = reg_read(REG_DUNIT_CTRL_LOW_ADDR);  in ddr3_write_leveling_sw_reg_dimm()
916 			reg = reg_read(REG_DDR3_MR1_ADDR) &  in ddr3_write_leveling_sw_reg_dimm()
940 	reg = reg_read(REG_DRAM_TRAINING_2_ADDR) |  in ddr3_write_leveling_sw_reg_dimm()
948 	reg = reg_read(REG_DRAM_TRAINING_2_ADDR) &  in ddr3_write_leveling_sw_reg_dimm()
972 					    ((reg_read  in ddr3_write_leveling_sw_reg_dimm()
983 			reg = reg_read(REG_DDR3_MR1_ADDR) &  in ddr3_write_leveling_sw_reg_dimm()
1019 			reg = reg_read(REG_TRAINING_WL_ADDR) |  in ddr3_write_leveling_sw_reg_dimm()
1034 			reg = reg_read(REG_DDR3_MR1_ADDR) &  in ddr3_write_leveling_sw_reg_dimm()
1056 	reg = reg_read(REG_DRAM_TRAINING_2_ADDR);  in ddr3_write_leveling_sw_reg_dimm()
1063 	reg = reg_read(REG_DRAM_TRAINING_2_ADDR);  in ddr3_write_leveling_sw_reg_dimm()
1071 			reg = reg_read(REG_DDR3_MR1_ADDR) &  in ddr3_write_leveling_sw_reg_dimm()
1095 		reg = reg_read(REG_DUNIT_CTRL_LOW_ADDR) |  in ddr3_write_leveling_sw_reg_dimm()
1165 	reg = reg_read(REG_SDRAM_ODT_CTRL_HIGH_ADDR) &  in ddr3_write_leveling_single_cs()
1179 	reg = (reg_read(REG_TRAINING_WL_ADDR) & REG_TRAINING_WL_CS_MASK) | cs;  in ddr3_write_leveling_single_cs()
1193 		reg = (reg_read(REG_TRAINING_WL_ADDR) &  in ddr3_write_leveling_single_cs()
1196 		reg = (reg_read(REG_TRAINING_WL_ADDR) &  in ddr3_write_leveling_single_cs()
1205 		reg = (reg_read(REG_TRAINING_WL_ADDR)) &  in ddr3_write_leveling_single_cs()
1210 	reg = (reg_read(REG_TRAINING_WL_ADDR) >> REG_TRAINING_WL_RESULTS_OFFS) &  in ddr3_write_leveling_single_cs()
1238 				reg = (reg_read(REG_TRAINING_WL_ADDR) &  in ddr3_write_leveling_single_cs()
1242 				reg = (reg_read(REG_TRAINING_WL_ADDR) &  in ddr3_write_leveling_single_cs()
1250 				reg = (reg_read(REG_TRAINING_WL_ADDR)) &  in ddr3_write_leveling_single_cs()
1255 			reg = reg_read(REG_TRAINING_WL_ADDR);  in ddr3_write_leveling_single_cs()
1328 	reg =  reg_read(REG_SDRAM_ODT_CTRL_HIGH_ADDR) &  in ddr3_write_leveling_single_cs()
1363 		reg = (reg_read(REG_PHY_REGISTRY_FILE_ACCESS_ADDR)) &  in ddr3_write_ctrl_pup_reg()