Lines Matching refs:P
122 dram_info->wl_val[cs][pup][P] = phase; in ddr3_write_leveling_hw()
149 [P], 1); in ddr3_write_leveling_hw()
347 [pup_num][P] + in ddr3_wl_supplement()
352 [P] = phase; in ddr3_wl_supplement()
368 [P]; in ddr3_wl_supplement()
385 [P] = phase; in ddr3_wl_supplement()
545 dram_info->wl_val[cs][pup][P] = phase; in ddr3_write_leveling_hw_reg_dimm()
555 dram_info->wl_val[cs][pup][P] = in ddr3_write_leveling_hw_reg_dimm()
585 [P], 1); in ddr3_write_leveling_hw_reg_dimm()
1269 dram_info->wl_val[cs][pup][P] = phase; in ddr3_write_leveling_single_cs()
1306 DEBUG_WL_D((u32) dram_info->wl_val[cs][pup][P], 1); in ddr3_write_leveling_single_cs()
1322 phase = dram_info->wl_val[cs][pup][P]; in ddr3_write_leveling_single_cs()