185 static u32 ddr3_get_max_val(u32 spd_val, u32 dimm_num, u32 static_val);
186 static u32 ddr3_get_min_val(u32 spd_val, u32 dimm_num, u32 static_val);
207 	u32 dimm_num = 0;  in ddr3_get_dimm_num()  local
216 		if ((dimm_num == 0) && (dimm_cur_addr < FAR_END_DIMM_ADDR))  in ddr3_get_dimm_num()
222 				dimm_addr[dimm_num] = dimm_cur_addr;  in ddr3_get_dimm_num()
223 				dimm_num++;  in ddr3_get_dimm_num()
228 	return dimm_num;  in ddr3_get_dimm_num()
583 	u32 dimm_num = 0;  local
603 	dimm_num = 1;
613 	dimm_num = ddr3_get_dimm_num(dimm_addr);
614 	if (dimm_num == 0) {
623 			     dimm_num, 1);
626 	for (dimm = 0; dimm < dimm_num; dimm++) {
644 	for (dimm = 0; dimm < dimm_num; dimm++)
661 	if (dimm_num) {
675 				if (dimm == dimm_num)
703 			      dimm_num, ddr3_valid_cl_to_cl(reg));
716 	if (ecc_ena && ddr3_get_min_val(sum_info.err_check_type, dimm_num,
738 	if (ddr3_get_min_val(sum_info.data_width, dimm_num, BUS_WIDTH) == 64) {
762 			       dimm_num, stat_val);
794 	tmp = ddr3_get_max_val(spd_val, dimm_num, stat_val);
803 	tmp = ddr3_get_max_val(spd_val, dimm_num, stat_val);
811 	tmp = ddr3_get_max_val(spd_val, dimm_num, stat_val);
819 	tmp = ddr3_get_max_val(spd_val, dimm_num, stat_val);
827 	tmp = ddr3_get_max_val(spd_val, dimm_num, stat_val);
835 	tmp = ddr3_get_max_val(spd_val, dimm_num, stat_val);
843 	tmp = ddr3_get_max_val(spd_val, dimm_num, stat_val);
860 	tmp = ddr3_get_max_val(spd_val, dimm_num, stat_val);
875 	tmp = ddr3_get_max_val(spd_val, dimm_num, stat_val);
884 	tmp = ddr3_get_max_val(spd_val, dimm_num, stat_val);
1263 u32 ddr3_get_max_val(u32 spd_val, u32 dimm_num, u32 static_val)  argument
1266 	if (dimm_num > 0) {
1286 u32 ddr3_get_min_val(u32 spd_val, u32 dimm_num, u32 static_val)  argument
1289 	if (dimm_num > 0) {