79 	reg = reg_read(REG_DRAM_TRAINING_SHADOW_ADDR) |  in ddr3_read_leveling_hw()
85 		reg = reg_read(REG_DRAM_TRAINING_SHADOW_ADDR) &  in ddr3_read_leveling_hw()
90 	if (reg_read(REG_DRAM_TRAINING_SHADOW_ADDR) &  in ddr3_read_leveling_hw()
152 			reg_read(REG_READ_DATA_READY_DELAYS_ADDR) &  in ddr3_read_leveling_hw()
155 			reg_read(REG_READ_DATA_SAMPLE_DELAYS_ADDR) &  in ddr3_read_leveling_hw()
189 	reg = reg_read(REG_DRAM_TRAINING_2_ADDR) |  in ddr3_read_leveling_sw()
208 			reg = reg_read(REG_DRAM_TRAINING_2_ADDR) &  in ddr3_read_leveling_sw()
220 			reg = reg_read(REG_READ_DATA_SAMPLE_DELAYS_ADDR);  in ddr3_read_leveling_sw()
228 			reg = reg_read(REG_READ_DATA_READY_DELAYS_ADDR);  in ddr3_read_leveling_sw()
299 	reg = reg_read(REG_DRAM_TRAINING_2_ADDR) |  in ddr3_read_leveling_sw()
305 		reg = (reg_read(REG_DRAM_TRAINING_2_ADDR)) &  in ddr3_read_leveling_sw()
310 	reg = reg_read(REG_DRAM_TRAINING_2_ADDR) &  in ddr3_read_leveling_sw()
319 	reg = reg_read(REG_DRAM_TRAINING_2_ADDR) &  in ddr3_read_leveling_sw()
446 		reg = reg_read(REG_DRAM_TRAINING_2_ADDR) |  in ddr3_read_leveling_single_cs_rl_mode()
452 			reg = (reg_read(REG_DRAM_TRAINING_2_ADDR)) &  in ddr3_read_leveling_single_cs_rl_mode()
469 			if (!((reg_read(REG_DRAM_TRAINING_2_ADDR) >>  in ddr3_read_leveling_single_cs_rl_mode()
617 					reg = reg_read(REG_READ_DATA_SAMPLE_DELAYS_ADDR);  in ddr3_read_leveling_single_cs_rl_mode()
635 					add = reg_read(REG_TRAINING_DEBUG_2_ADDR);  in ddr3_read_leveling_single_cs_rl_mode()
660 					add = reg_read(REG_TRAINING_DEBUG_3_ADDR);  in ddr3_read_leveling_single_cs_rl_mode()
667 				reg = reg_read(REG_READ_DATA_READY_DELAYS_ADDR);  in ddr3_read_leveling_single_cs_rl_mode()
700 		add = reg_read(REG_TRAINING_DEBUG_2_ADDR);  in ddr3_read_leveling_single_cs_rl_mode()
718 		add = reg_read(REG_TRAINING_DEBUG_3_ADDR);  in ddr3_read_leveling_single_cs_rl_mode()
723 	reg = reg_read(REG_READ_DATA_READY_DELAYS_ADDR);  in ddr3_read_leveling_single_cs_rl_mode()
800 		reg = reg_read(REG_DRAM_TRAINING_2_ADDR) |  in ddr3_read_leveling_single_cs_window_mode()
806 			reg = (reg_read(REG_DRAM_TRAINING_2_ADDR)) &  in ddr3_read_leveling_single_cs_window_mode()
828 			if (!((reg_read(REG_DRAM_TRAINING_2_ADDR) >>  in ddr3_read_leveling_single_cs_window_mode()
1022 					reg = reg_read(REG_READ_DATA_SAMPLE_DELAYS_ADDR);  in ddr3_read_leveling_single_cs_window_mode()
1040 					add = reg_read(REG_TRAINING_DEBUG_2_ADDR);  in ddr3_read_leveling_single_cs_window_mode()
1064 					add = reg_read(REG_TRAINING_DEBUG_3_ADDR);  in ddr3_read_leveling_single_cs_window_mode()
1069 				reg = reg_read(REG_READ_DATA_READY_DELAYS_ADDR);  in ddr3_read_leveling_single_cs_window_mode()
1175 		add = reg_read(REG_TRAINING_DEBUG_2_ADDR);  in ddr3_read_leveling_single_cs_window_mode()
1191 		add = reg_read(REG_TRAINING_DEBUG_3_ADDR);  in ddr3_read_leveling_single_cs_window_mode()
1196 	reg = reg_read(REG_READ_DATA_READY_DELAYS_ADDR);  in ddr3_read_leveling_single_cs_window_mode()