60 static int ddr3_tx_shift_dqs_adll_step_before_fail(MV_DRAM_INFO *dram_info,
62 static int ddr3_rx_shift_dqs_to_first_fail(MV_DRAM_INFO *dram_info, u32 cur_pup,
64 static int ddr3_pbs_per_bit(MV_DRAM_INFO *dram_info, int *start_over, int is_tx,
66 static int ddr3_set_pbs_results(MV_DRAM_INFO *dram_info, int is_tx);
76 int ddr3_pbs_tx(MV_DRAM_INFO *dram_info)  in ddr3_pbs_tx()  argument
105 	pups = dram_info->num_of_total_pups;  in ddr3_pbs_tx()
106 	max_pup = dram_info->num_of_total_pups;  in ddr3_pbs_tx()
136 			for (ecc = 0; ecc < (dram_info->ecc_ena + 1); ecc++) {  in ddr3_pbs_tx()
143 					dram_info->num_of_std_pups + ecc;  in ddr3_pbs_tx()
162 				reg |= (dram_info->ecc_ena * ecc <<  in ddr3_pbs_tx()
219 					    (dram_info, cur_pup, pattern_idx,  in ddr3_pbs_tx()
230 						    dram_info, &start_over, 1,  in ddr3_pbs_tx()
372 		if (pup == (max_pup - 1) && dram_info->ecc_ena)  in ddr3_pbs_tx()
378 	ddr3_set_pbs_results(dram_info, 1);  in ddr3_pbs_tx()
405 static int ddr3_tx_shift_dqs_adll_step_before_fail(MV_DRAM_INFO *dram_info,  in ddr3_tx_shift_dqs_adll_step_before_fail()  argument
417 	switch (dram_info->ddr_width) {  in ddr3_tx_shift_dqs_adll_step_before_fail()
439 		cur_max_pup = dram_info->num_of_std_pups;  in ddr3_tx_shift_dqs_adll_step_before_fail()
463 		if (MV_OK != ddr3_sdram_compare(dram_info, unlock_pup,  in ddr3_tx_shift_dqs_adll_step_before_fail()
520 int ddr3_pbs_rx(MV_DRAM_INFO *dram_info)  in ddr3_pbs_rx()  argument
548 	pups = dram_info->num_of_total_pups;  in ddr3_pbs_rx()
549 	max_pup = dram_info->num_of_total_pups;  in ddr3_pbs_rx()
579 			for (ecc = 0; ecc < (dram_info->ecc_ena + 1); ecc++) {  in ddr3_pbs_rx()
585 					dram_info->num_of_std_pups + ecc;  in ddr3_pbs_rx()
604 				reg |= (dram_info->ecc_ena * ecc <<  in ddr3_pbs_rx()
666 						(dram_info, cur_pup,  in ddr3_pbs_rx()
730 						    dram_info, &start_over,  in ddr3_pbs_rx()
890 	ddr3_set_pbs_results(dram_info, 0);  in ddr3_pbs_rx()
917 static int ddr3_rx_shift_dqs_to_first_fail(MV_DRAM_INFO *dram_info, u32 cur_pup,  in ddr3_rx_shift_dqs_to_first_fail()  argument
928 	switch (dram_info->ddr_width) {  in ddr3_rx_shift_dqs_to_first_fail()
950 		cur_max_pup = dram_info->num_of_std_pups;  in ddr3_rx_shift_dqs_to_first_fail()
966 		if (MV_OK != ddr3_sdram_compare(dram_info, unlock_pup,  in ddr3_rx_shift_dqs_to_first_fail()
1025 		if (MV_OK != ddr3_sdram_compare(dram_info, unlock_pup, &new_lockup_pup,  in ddr3_rx_shift_dqs_to_first_fail()
1137 static int ddr3_pbs_per_bit(MV_DRAM_INFO *dram_info, int *start_over, int is_tx,  in ddr3_pbs_per_bit()  argument
1192 		max_pup = dram_info->num_of_std_pups;  in ddr3_pbs_per_bit()
1241 			    ddr3_sdram_pbs_compare(dram_info, pup_locked, is_tx,  in ddr3_pbs_per_bit()
1417 static int ddr3_set_pbs_results(MV_DRAM_INFO *dram_info, int is_tx)  in ddr3_set_pbs_results()  argument
1425 	max_pup = dram_info->num_of_total_pups;  in ddr3_set_pbs_results()
1430 		if (pup == (max_pup - 1) && dram_info->ecc_ena)  in ddr3_set_pbs_results()
1531 int ddr3_load_pbs_patterns(MV_DRAM_INFO *dram_info)  in ddr3_load_pbs_patterns()  argument
1538 	switch (dram_info->ddr_width) {  in ddr3_load_pbs_patterns()
1561 		if (dram_info->cs_ena & (1 << cs)) {  in ddr3_load_pbs_patterns()
1564 				if (dram_info->cs_ena & (1 << cs_tmp))  in ddr3_load_pbs_patterns()
1572 			    ddr3_sdram_compare(dram_info, (u32) NULL, NULL,  in ddr3_load_pbs_patterns()
1582 			    ddr3_sdram_compare(dram_info, (u32) NULL, NULL,  in ddr3_load_pbs_patterns()