Lines Matching refs:DEBUG_PBS_S
22 DEBUG_PBS_S(s); DEBUG_PBS_D(d, l); DEBUG_PBS_S("\n")
25 #define DEBUG_PBS_S(s) puts(s) macro
28 #define DEBUG_PBS_S(s) macro
103 DEBUG_PBS_S("DDR3 - PBS TX - Starting PBS TX procedure\n"); in ddr3_pbs_tx()
114 DEBUG_PBS_S("DDR3 - PBS RX - SW Override Enabled\n"); in ddr3_pbs_tx()
167 DEBUG_PBS_S("DDR3 - PBS Tx - ECC Mux Enabled\n"); in ddr3_pbs_tx()
169 DEBUG_PBS_S("DDR3 - PBS Tx - ECC Mux Disabled\n"); in ddr3_pbs_tx()
192 DEBUG_PBS_S("DDR3 - PBS Tx - Pbs Rep Loop is "); in ddr3_pbs_tx()
194 DEBUG_PBS_S(", for Retry No."); in ddr3_pbs_tx()
196 DEBUG_PBS_S("\n"); in ddr3_pbs_tx()
199 DEBUG_PBS_S("DDR3 - PBS Tx - Set all PBS values to MIN\n"); in ddr3_pbs_tx()
216 DEBUG_PBS_S("DDR3 - PBS Tx - ADLL shift right one phase before fail\n"); in ddr3_pbs_tx()
224 DEBUG_PBS_S("DDR3 - PBS Tx - perform PBS for each bit\n"); in ddr3_pbs_tx()
239 DEBUG_PBS_S("DDR3 - PBS Tx - FAIL - Adll reach max value\n"); in ddr3_pbs_tx()
250 DEBUG_PBS_S("DDR3 - PBS - PUP"); in ddr3_pbs_tx()
252 DEBUG_PBS_S(": "); in ddr3_pbs_tx()
262 DEBUG_PBS_S("DQ"); in ddr3_pbs_tx()
264 DEBUG_PBS_S("-"); in ddr3_pbs_tx()
268 DEBUG_PBS_S(", "); in ddr3_pbs_tx()
270 DEBUG_PBS_S("\n"); in ddr3_pbs_tx()
299 DEBUG_PBS_S("DDR3 - PBS - PUP"); in ddr3_pbs_tx()
301 DEBUG_PBS_S(": "); in ddr3_pbs_tx()
306 DEBUG_PBS_S("DQ"); in ddr3_pbs_tx()
308 DEBUG_PBS_S("-"); in ddr3_pbs_tx()
311 DEBUG_PBS_S(", "); in ddr3_pbs_tx()
313 DEBUG_PBS_S("\n"); in ddr3_pbs_tx()
344 DEBUG_PBS_S("DDR3 - PBS TX - Average for all patterns:\n"); in ddr3_pbs_tx()
350 DEBUG_PBS_S("DDR3 - PBS - PUP"); in ddr3_pbs_tx()
352 DEBUG_PBS_S(": "); in ddr3_pbs_tx()
361 DEBUG_PBS_S("DQ"); in ddr3_pbs_tx()
363 DEBUG_PBS_S("-"); in ddr3_pbs_tx()
365 DEBUG_PBS_S(", "); in ddr3_pbs_tx()
367 DEBUG_PBS_S("\n"); in ddr3_pbs_tx()
391 DEBUG_PBS_S("DDR3 - PBS Tx - PBS TX ended successfuly\n"); in ddr3_pbs_tx()
546 DEBUG_PBS_S("DDR3 - PBS RX - Starting PBS RX procedure\n"); in ddr3_pbs_rx()
669 DEBUG_PBS_S("DDR3 - PBS Rx - ddr3_rx_shift_dqs_to_first_fail failed.\n"); in ddr3_pbs_rx()
671 DEBUG_PBS_S("\nDDR3 - PBS Rx - SKIP.\n"); in ddr3_pbs_rx()
733 DEBUG_PBS_S("DDR3 - PBS Rx - ddr3_pbs_per_bit failed."); in ddr3_pbs_rx()
831 DEBUG_PBS_S("DDR3 - PBS RX - PUP"); in ddr3_pbs_rx()
833 DEBUG_PBS_S(": "); in ddr3_pbs_rx()
842 DEBUG_PBS_S("DQ"); in ddr3_pbs_rx()
844 DEBUG_PBS_S("-"); in ddr3_pbs_rx()
847 DEBUG_PBS_S(", "); in ddr3_pbs_rx()
849 DEBUG_PBS_S("\n"); in ddr3_pbs_rx()
860 DEBUG_PBS_S("DDR3 - PBS RX - Average for all patterns:\n"); in ddr3_pbs_rx()
866 DEBUG_PBS_S("DDR3 - PBS - PUP"); in ddr3_pbs_rx()
868 DEBUG_PBS_S(": "); in ddr3_pbs_rx()
877 DEBUG_PBS_S("DQ"); in ddr3_pbs_rx()
879 DEBUG_PBS_S("-"); in ddr3_pbs_rx()
881 DEBUG_PBS_S(", "); in ddr3_pbs_rx()
883 DEBUG_PBS_S("\n"); in ddr3_pbs_rx()
972 …DEBUG_PBS_S("DDR3 - PBS Rx - Shift DQS - MV_DDR3_TRAINING_ERR_PBS_SHIFT_QDS_SRAM_CMP(ddr3_sdram_co… in ddr3_rx_shift_dqs_to_first_fail()
981 DEBUG_PBS_S("DDR3 - PBS Rx - Shift DQS - fail on start with first deskew value\n"); in ddr3_rx_shift_dqs_to_first_fail()
1030 …DEBUG_PBS_S("DDR3 - PBS Rx - Shift DQS - MV_DDR3_TRAINING_ERR_PBS_SHIFT_QDS_SRAM_CMP(ddr3_sdram_co… in ddr3_rx_shift_dqs_to_first_fail()