783 	MV_DRAM_MODES *ddr_mode;  in ddr3_static_training_init()  local
787 	ddr_mode = ddr3_get_static_ddr_mode();  in ddr3_static_training_init()
790 	while (ddr_mode->vals[j].reg_addr != 0) {  in ddr3_static_training_init()
792 		reg_write(ddr_mode->vals[j].reg_addr,  in ddr3_static_training_init()
793 			  ddr_mode->vals[j].reg_value);  in ddr3_static_training_init()
795 		if (ddr_mode->vals[j].reg_addr ==  in ddr3_static_training_init()
883 	MV_DRAM_MODES *ddr_mode;  in ddr3_static_mc_init()  local
887 	ddr_mode = ddr3_get_static_ddr_mode();  in ddr3_static_mc_init()
889 	while (ddr_mode->regs[j].reg_addr != 0) {  in ddr3_static_mc_init()
890 		reg_write(ddr_mode->regs[j].reg_addr,  in ddr3_static_mc_init()
891 			  ddr_mode->regs[j].reg_value);  in ddr3_static_mc_init()
892 		if (ddr_mode->regs[j].reg_addr ==  in ddr3_static_mc_init()