Lines Matching refs:DEBUG_INIT_S

284 		DEBUG_INIT_S("DDR3 Training Error: Bad sample at reset");  in ddr3_init()
286 		DEBUG_INIT_S("DDR3 Training Error: Bad DIMM setup");  in ddr3_init()
288 		DEBUG_INIT_S("DDR3 Training Error: Max CS limit");  in ddr3_init()
290 		DEBUG_INIT_S("DDR3 Training Error: Max enable CS limit");  in ddr3_init()
292 		DEBUG_INIT_S("DDR3 Training Error: Bad R-DIMM setup");  in ddr3_init()
294 		DEBUG_INIT_S("DDR3 Training Error: TWSI failure");  in ddr3_init()
296 		DEBUG_INIT_S("DDR3 Training Error: DIMM type no match");  in ddr3_init()
298 		DEBUG_INIT_S("DDR3 Training Error: TWSI bad type");  in ddr3_init()
300 		DEBUG_INIT_S("DDR3 Training Error: bus width no match");  in ddr3_init()
372 	DEBUG_INIT_S("4\n");  in ddr3_init_main()
416 		DEBUG_INIT_S("DDR3 Training Sequence - FAILED - Wrong Sample at Reset Configurations\n");  in ddr3_init_main()
455 		DEBUG_INIT_S("DDR3 Training Sequence - 2nd boot - Skip\n");  in ddr3_init_main()
491 		DEBUG_INIT_S("DDR3 Training Sequence - DRAM bus width 32Bit\n");  in ddr3_init_main()
507 		DEBUG_INIT_S("DDR3 Training Sequence - FAILED (ddr3 Dunit Setup)\n");  in ddr3_init_main()
677 	DEBUG_INIT_S("DDR3 Training Sequence - Ended Successfully (S)\n");  in ddr3_init_main()
679 	DEBUG_INIT_S("DDR3 Training Sequence - Ended Successfully\n");  in ddr3_init_main()