Lines Matching refs:reg_write
48 reg_write(XOR_WINDOW_CTRL_REG(0, 0), reg); in mv_sys_xor_init()
73 reg_write(XOR_BASE_ADDR_REG(0, cs_count), base); in mv_sys_xor_init()
76 reg_write(XOR_SIZE_MASK_REG(0, cs_count), 0x7fff0000); in mv_sys_xor_init()
90 reg_write(XOR_WINDOW_CTRL_REG(0, 0), ui_xor_regs_ctrl_backup); in mv_sys_xor_finish()
92 reg_write(XOR_BASE_ADDR_REG(0, ui), in mv_sys_xor_finish()
95 reg_write(XOR_SIZE_MASK_REG(0, ui), in mv_sys_xor_finish()
98 reg_write(XOR_ADDR_OVRD_REG(0, 0), 0); in mv_sys_xor_finish()
152 reg_write(XOR_CONFIG_REG(XOR_UNIT(chan), XOR_CHAN(chan)), xor_ctrl); in mv_xor_ctrl_set()
177 reg_write(XOR_CONFIG_REG(XOR_UNIT(chan), XOR_CHAN(chan)), temp); in mv_xor_mem_init()
183 reg_write(XOR_DST_PTR_REG(XOR_UNIT(chan), XOR_CHAN(chan)), start_ptr); in mv_xor_mem_init()
189 reg_write(XOR_BLOCK_SIZE_REG(XOR_UNIT(chan), XOR_CHAN(chan)), in mv_xor_mem_init()
196 reg_write(XOR_INIT_VAL_LOW_REG(XOR_UNIT(chan)), init_val_low); in mv_xor_mem_init()
202 reg_write(XOR_INIT_VAL_HIGH_REG(XOR_UNIT(chan)), init_val_high); in mv_xor_mem_init()