Lines Matching refs:if_id

52 	u32 pup = 0, bit = 0, if_id = 0, all_lock = 0, cs_num = 0;  in ddr3_tip_pbs()  local
61 for (if_id = 0; if_id <= MAX_INTERFACE_NUM - 1; if_id++) { in ddr3_tip_pbs()
62 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_pbs()
66 (dev_num, ACCESS_TYPE_UNICAST, if_id, in ddr3_tip_pbs()
71 (dev_num, ACCESS_TYPE_UNICAST, if_id, in ddr3_tip_pbs()
93 for (if_id = 0; if_id <= MAX_INTERFACE_NUM - 1; if_id++) { in ddr3_tip_pbs()
94 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_pbs()
95 min_adll_per_pup[if_id][pup] = in ddr3_tip_pbs()
97 pup_state[if_id][pup] = 0x3; in ddr3_tip_pbs()
98 adll_shift_lock[if_id][pup] = 1; in ddr3_tip_pbs()
99 max_adll_per_pup[if_id][pup] = 0x0; in ddr3_tip_pbs()
113 for (if_id = 0; if_id <= MAX_INTERFACE_NUM - 1; in ddr3_tip_pbs()
114 if_id++) { in ddr3_tip_pbs()
115 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_pbs()
118 if_id, bit, pup, in ddr3_tip_pbs()
119 res0[if_id])); in ddr3_tip_pbs()
120 if (pup_state[if_id][pup] != 3) in ddr3_tip_pbs()
124 if ((res0[if_id] & 0x2000000) == 0) { in ddr3_tip_pbs()
128 pup_state[if_id][pup] = 1; in ddr3_tip_pbs()
129 adll_shift_lock[if_id][pup] = 0; in ddr3_tip_pbs()
133 else if ((res0[if_id] & res_valid_mask) == in ddr3_tip_pbs()
137 if_id, bit, pup, in ddr3_tip_pbs()
138 res0[if_id])); in ddr3_tip_pbs()
139 pup_state[if_id][pup] = 4; in ddr3_tip_pbs()
141 adll_shift_lock[if_id][pup] = 0; in ddr3_tip_pbs()
148 res0[if_id] = in ddr3_tip_pbs()
150 ((res0[if_id] & in ddr3_tip_pbs()
152 ((res0[if_id] & in ddr3_tip_pbs()
154 max_adll_per_pup[if_id][pup] = in ddr3_tip_pbs()
155 (max_adll_per_pup[if_id][pup] < in ddr3_tip_pbs()
156 res0[if_id]) ? in ddr3_tip_pbs()
157 (u8)res0[if_id] : in ddr3_tip_pbs()
158 max_adll_per_pup[if_id][pup]; in ddr3_tip_pbs()
159 min_adll_per_pup[if_id][pup] = in ddr3_tip_pbs()
160 (res0[if_id] > in ddr3_tip_pbs()
161 min_adll_per_pup[if_id][pup]) ? in ddr3_tip_pbs()
162 min_adll_per_pup[if_id][pup] : in ddr3_tip_pbs()
164 res0[if_id]; in ddr3_tip_pbs()
170 adll_shift_val[if_id][pup] = in ddr3_tip_pbs()
172 max_adll_per_pup[if_id][pup] : in ddr3_tip_pbs()
173 min_adll_per_pup[if_id][pup]; in ddr3_tip_pbs()
182 for (if_id = 0; if_id <= MAX_INTERFACE_NUM - 1; if_id++) { in ddr3_tip_pbs()
183 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_pbs()
185 if (pup_state[if_id][pup] != 4) in ddr3_tip_pbs()
195 (dev_num, ACCESS_TYPE_UNICAST, if_id, in ddr3_tip_pbs()
202 (dev_num, ACCESS_TYPE_UNICAST, if_id, in ddr3_tip_pbs()
206 adll_shift_val[if_id][pup] = 0; in ddr3_tip_pbs()
207 min_adll_per_pup[if_id][pup] = in ddr3_tip_pbs()
209 max_adll_per_pup[if_id][pup] = 0x0; in ddr3_tip_pbs()
234 if_id, bit, pup, in ddr3_tip_pbs()
235 res0[if_id])); in ddr3_tip_pbs()
237 if ((res0[if_id] & 0x2000000) == 0) { in ddr3_tip_pbs()
249 pup_state[if_id][pup] = 2; in ddr3_tip_pbs()
250 adll_shift_lock[if_id][pup] = 0; in ddr3_tip_pbs()
257 if_id, in ddr3_tip_pbs()
267 if_id, in ddr3_tip_pbs()
272 } else if ((res0[if_id] & res_valid_mask) == in ddr3_tip_pbs()
279 pup_state[if_id][pup] = 2; in ddr3_tip_pbs()
280 adll_shift_lock[if_id][pup] = 0; in ddr3_tip_pbs()
287 if_id, in ddr3_tip_pbs()
297 if_id, in ddr3_tip_pbs()
303 adll_shift_lock[if_id][pup] = 1; in ddr3_tip_pbs()
308 res0[if_id] = in ddr3_tip_pbs()
310 ((res0[if_id] & in ddr3_tip_pbs()
312 ((res0[if_id] & in ddr3_tip_pbs()
314 max_adll_per_pup[if_id][pup] = in ddr3_tip_pbs()
315 (max_adll_per_pup[if_id][pup] < in ddr3_tip_pbs()
316 res0[if_id]) ? in ddr3_tip_pbs()
317 (u8)res0[if_id] : in ddr3_tip_pbs()
318 max_adll_per_pup[if_id][pup]; in ddr3_tip_pbs()
319 min_adll_per_pup[if_id][pup] = in ddr3_tip_pbs()
320 (res0[if_id] > in ddr3_tip_pbs()
321 min_adll_per_pup[if_id][pup]) ? in ddr3_tip_pbs()
322 min_adll_per_pup[if_id][pup] : in ddr3_tip_pbs()
323 (u8)res0[if_id]; in ddr3_tip_pbs()
329 adll_shift_val[if_id][pup] = in ddr3_tip_pbs()
331 max_adll_per_pup[if_id][pup] : in ddr3_tip_pbs()
332 min_adll_per_pup[if_id][pup]; in ddr3_tip_pbs()
341 for (if_id = 0; if_id <= MAX_INTERFACE_NUM - 1; if_id++) { in ddr3_tip_pbs()
342 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_pbs()
345 if_id, pup, in ddr3_tip_pbs()
346 adll_shift_lock[if_id][pup], in ddr3_tip_pbs()
347 max_adll_per_pup[if_id][pup], in ddr3_tip_pbs()
348 min_adll_per_pup[if_id][pup])); in ddr3_tip_pbs()
356 for (if_id = 0; if_id <= MAX_INTERFACE_NUM - 1; if_id++) { in ddr3_tip_pbs()
357 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_pbs()
358 if (adll_shift_lock[if_id][pup] != 1) in ddr3_tip_pbs()
366 (dev_num, ACCESS_TYPE_UNICAST, if_id, in ddr3_tip_pbs()
368 reg_addr, adll_shift_val[if_id][pup])); in ddr3_tip_pbs()
370 ("FP I/F %d, Pup[%d] = %d\n", if_id, in ddr3_tip_pbs()
371 pup, adll_shift_val[if_id][pup])); in ddr3_tip_pbs()
379 for (if_id = 0; if_id <= MAX_INTERFACE_NUM - 1; if_id++) { in ddr3_tip_pbs()
380 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_pbs()
381 max_pbs_per_pup[if_id][pup] = 0x0; in ddr3_tip_pbs()
382 min_pbs_per_pup[if_id][pup] = 0x1f; in ddr3_tip_pbs()
386 if_id * MAX_BUS_NUM * in ddr3_tip_pbs()
406 for (if_id = 0; if_id <= MAX_INTERFACE_NUM - 1; if_id++) { in ddr3_tip_pbs()
407 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_pbs()
408 if (adll_shift_lock[if_id][pup] != 1) { in ddr3_tip_pbs()
423 if_id, bit, pup, in ddr3_tip_pbs()
424 res0[if_id])); in ddr3_tip_pbs()
425 if ((res0[if_id] & 0x2000000) == 0) { in ddr3_tip_pbs()
434 adll_shift_lock[if_id][pup] = 0; in ddr3_tip_pbs()
436 pup_state[if_id][pup] = 2; in ddr3_tip_pbs()
437 max_pbs_per_pup[if_id][pup] = 0x0; in ddr3_tip_pbs()
438 min_pbs_per_pup[if_id][pup] = 0x1f; in ddr3_tip_pbs()
441 temp = (u8)(res0[if_id] & in ddr3_tip_pbs()
443 max_pbs_per_pup[if_id][pup] = in ddr3_tip_pbs()
445 max_pbs_per_pup[if_id][pup]) ? in ddr3_tip_pbs()
447 max_pbs_per_pup[if_id][pup]; in ddr3_tip_pbs()
448 min_pbs_per_pup[if_id][pup] = in ddr3_tip_pbs()
450 min_pbs_per_pup[if_id][pup]) ? in ddr3_tip_pbs()
452 min_pbs_per_pup[if_id][pup]; in ddr3_tip_pbs()
455 if_id * MAX_BUS_NUM * in ddr3_tip_pbs()
467 for (if_id = 0; if_id <= MAX_INTERFACE_NUM - 1; if_id++) { in ddr3_tip_pbs()
468 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_pbs()
469 all_lock = all_lock * adll_shift_lock[if_id][pup]; in ddr3_tip_pbs()
484 for (if_id = 0; if_id <= MAX_INTERFACE_NUM - 1; in ddr3_tip_pbs()
485 if_id++) { in ddr3_tip_pbs()
486 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_pbs()
487 if (adll_shift_lock[if_id][pup] == 1) { in ddr3_tip_pbs()
492 adll_shift_lock[if_id][pup] = 0; in ddr3_tip_pbs()
498 if_id, ACCESS_TYPE_UNICAST, pup, in ddr3_tip_pbs()
505 if_id, ACCESS_TYPE_UNICAST, pup, in ddr3_tip_pbs()
512 if_id, ACCESS_TYPE_UNICAST, pup, in ddr3_tip_pbs()
515 adll_shift_val[if_id][pup] = 0; in ddr3_tip_pbs()
516 min_adll_per_pup[if_id][pup] = 0x1f; in ddr3_tip_pbs()
517 max_adll_per_pup[if_id][pup] = 0x0; in ddr3_tip_pbs()
546 if_id, bit, pup, res0[if_id])); in ddr3_tip_pbs()
547 if ((res0[if_id] & 0x2000000) == 0) { in ddr3_tip_pbs()
551 pup_state[if_id][pup] = 1; in ddr3_tip_pbs()
561 adll_shift_lock[if_id][pup]++; in ddr3_tip_pbs()
566 res0[if_id] = in ddr3_tip_pbs()
568 ((res0[if_id] & res_valid_mask) + 1) : in ddr3_tip_pbs()
569 ((res0[if_id] & res_valid_mask) - 1); in ddr3_tip_pbs()
570 max_adll_per_pup[if_id][pup] = in ddr3_tip_pbs()
571 (max_adll_per_pup[if_id] in ddr3_tip_pbs()
572 [pup] < res0[if_id]) ? in ddr3_tip_pbs()
573 (u8)res0[if_id] : in ddr3_tip_pbs()
574 max_adll_per_pup[if_id][pup]; in ddr3_tip_pbs()
575 min_adll_per_pup[if_id][pup] = in ddr3_tip_pbs()
576 (res0[if_id] > in ddr3_tip_pbs()
577 min_adll_per_pup[if_id] in ddr3_tip_pbs()
579 min_adll_per_pup[if_id][pup] : in ddr3_tip_pbs()
580 (u8)res0[if_id]; in ddr3_tip_pbs()
586 adll_shift_val[if_id][pup] = in ddr3_tip_pbs()
588 max_adll_per_pup[if_id][pup] : in ddr3_tip_pbs()
589 min_adll_per_pup[if_id][pup]; in ddr3_tip_pbs()
593 adll_shift_lock[if_id][pup] = in ddr3_tip_pbs()
594 (adll_shift_lock[if_id][pup] == 8) ? in ddr3_tip_pbs()
601 if_id, ACCESS_TYPE_UNICAST, pup, in ddr3_tip_pbs()
603 adll_shift_val[if_id][pup])); in ddr3_tip_pbs()
607 if_id, pup, in ddr3_tip_pbs()
608 adll_shift_lock[if_id][pup])); in ddr3_tip_pbs()
633 for (if_id = 0; if_id <= MAX_INTERFACE_NUM - 1; in ddr3_tip_pbs()
634 if_id++) { in ddr3_tip_pbs()
635 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_pbs()
646 if (pup_state[if_id][pup] != 2) { in ddr3_tip_pbs()
657 if_id, bit, pup, res0[if_id])); in ddr3_tip_pbs()
658 if ((res0[if_id] & 0x2000000) == 0) { in ddr3_tip_pbs()
663 max_pbs_per_pup[if_id][pup] = in ddr3_tip_pbs()
668 if_id * MAX_BUS_NUM * in ddr3_tip_pbs()
672 temp = (u8)(res0[if_id] & in ddr3_tip_pbs()
674 max_pbs_per_pup[if_id][pup] = in ddr3_tip_pbs()
676 max_pbs_per_pup[if_id] in ddr3_tip_pbs()
679 [if_id][pup]; in ddr3_tip_pbs()
680 min_pbs_per_pup[if_id][pup] = in ddr3_tip_pbs()
682 min_pbs_per_pup[if_id] in ddr3_tip_pbs()
685 [if_id][pup]; in ddr3_tip_pbs()
689 if_id * MAX_BUS_NUM * in ddr3_tip_pbs()
692 adll_shift_lock[if_id][pup] = 1; in ddr3_tip_pbs()
714 for (if_id = 0; if_id <= MAX_INTERFACE_NUM - 1; in ddr3_tip_pbs()
715 if_id++) { in ddr3_tip_pbs()
716 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_pbs()
718 if (adll_shift_lock[if_id][pup] != 1) { in ddr3_tip_pbs()
722 if_id)); in ddr3_tip_pbs()
723 training_result[training_stage][if_id] in ddr3_tip_pbs()
726 result_mat[if_id][pup][bit] = 0; in ddr3_tip_pbs()
727 max_pbs_per_pup[if_id][pup] = 0; in ddr3_tip_pbs()
728 min_pbs_per_pup[if_id][pup] = 0; in ddr3_tip_pbs()
731 training_stage][if_id] = in ddr3_tip_pbs()
733 [if_id] == TEST_FAILED) ? in ddr3_tip_pbs()
735 result_mat[if_id][pup][bit] = in ddr3_tip_pbs()
739 if_id * MAX_BUS_NUM * in ddr3_tip_pbs()
741 min_pbs_per_pup[if_id][pup]; in ddr3_tip_pbs()
746 if_id, pup, in ddr3_tip_pbs()
747 min_pbs_per_pup[if_id][pup])); in ddr3_tip_pbs()
756 for (if_id = 0; if_id < MAX_INTERFACE_NUM; if_id++) { in ddr3_tip_pbs()
757 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_pbs()
764 if_id, pup, pup_state[if_id][pup])); in ddr3_tip_pbs()
774 if_id * BUS_WIDTH_IN_BITS * in ddr3_tip_pbs()
778 result_mat[if_id][pup] in ddr3_tip_pbs()
785 if_id, ACCESS_TYPE_UNICAST, pup, in ddr3_tip_pbs()
787 result_mat[if_id][pup][bit])); in ddr3_tip_pbs()
789 pbsdelay_per_pup[pbs_mode][if_id][pup] = in ddr3_tip_pbs()
790 (max_pbs_per_pup[if_id][pup] == in ddr3_tip_pbs()
791 min_pbs_per_pup[if_id][pup]) ? in ddr3_tip_pbs()
793 ((max_adll_per_pup[if_id][pup] - in ddr3_tip_pbs()
794 min_adll_per_pup[if_id][pup]) * adll_tap / in ddr3_tip_pbs()
795 (max_pbs_per_pup[if_id][pup] - in ddr3_tip_pbs()
796 min_pbs_per_pup[if_id][pup])); in ddr3_tip_pbs()
804 if_id, ACCESS_TYPE_UNICAST, pup, in ddr3_tip_pbs()
806 (max_pbs_per_pup[if_id][pup] - in ddr3_tip_pbs()
807 min_pbs_per_pup[if_id][pup]) / in ddr3_tip_pbs()
812 if_id, ACCESS_TYPE_UNICAST, pup, in ddr3_tip_pbs()
814 (max_pbs_per_pup[if_id][pup] - in ddr3_tip_pbs()
815 min_pbs_per_pup[if_id][pup]) / in ddr3_tip_pbs()
822 if_id, ACCESS_TYPE_UNICAST, pup, in ddr3_tip_pbs()
824 result_mat_rx_dqs[if_id][pup] in ddr3_tip_pbs()
829 if_id, ACCESS_TYPE_UNICAST, pup, in ddr3_tip_pbs()
831 result_mat_rx_dqs[if_id][pup] in ddr3_tip_pbs()
839 result_mat_rx_dqs[if_id][pup][effective_cs] = in ddr3_tip_pbs()
840 (max_pbs_per_pup[if_id][pup] - in ddr3_tip_pbs()
841 min_pbs_per_pup[if_id][pup]) / 2; in ddr3_tip_pbs()
846 pbsdelay_per_pup[pbs_mode][if_id][pup], in ddr3_tip_pbs()
847 ((max_pbs_per_pup[if_id][pup] - in ddr3_tip_pbs()
848 min_pbs_per_pup[if_id][pup]) * in ddr3_tip_pbs()
849 pbsdelay_per_pup[pbs_mode][if_id][pup]))); in ddr3_tip_pbs()
859 for (if_id = 0; if_id <= MAX_INTERFACE_NUM - 1; if_id++) { in ddr3_tip_pbs()
864 (dev_num, ACCESS_TYPE_UNICAST, if_id, in ddr3_tip_pbs()
869 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_pbs()
871 (dev_num, ACCESS_TYPE_UNICAST, if_id, in ddr3_tip_pbs()
872 CS_ENABLE_REG, cs_enable_reg_val[if_id], in ddr3_tip_pbs()
880 for (if_id = 0; if_id <= MAX_INTERFACE_NUM - 1; if_id++) { in ddr3_tip_pbs()
885 if (pup_state[if_id][pup] == 1) in ddr3_tip_pbs()
938 u32 data_value = 0, bit = 0, if_id = 0, pup = 0; in ddr3_tip_print_pbs_result() local
949 for (if_id = 0; if_id <= MAX_INTERFACE_NUM - 1; if_id++) { in ddr3_tip_print_pbs_result()
950 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_print_pbs_result()
956 (dev_num, if_id, in ddr3_tip_print_pbs_result()
976 u32 if_id, pup, bit; in ddr3_tip_clean_pbs_result() local
982 for (if_id = 0; if_id <= MAX_INTERFACE_NUM - 1; if_id++) { in ddr3_tip_clean_pbs_result()
983 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_clean_pbs_result()
988 if_id, ACCESS_TYPE_UNICAST, pup, in ddr3_tip_clean_pbs_result()