307 		mem_mask = 0, bus_index = 0;  in hws_ddr3_tip_init_controller()  local
333 			mem_mask = 0;  in hws_ddr3_tip_init_controller()
338 				mem_mask |=  in hws_ddr3_tip_init_controller()
343 			if (mem_mask != 0) {  in hws_ddr3_tip_init_controller()
1224 	u32 cl_value = 0, cwl_value = 0, mem_mask = 0, val = 0,  in ddr3_tip_freq_set()  local
1301 		mem_mask = 0;  in ddr3_tip_freq_set()
1305 			mem_mask |=  in ddr3_tip_freq_set()
1310 		if (mem_mask != 0) {  in ddr3_tip_freq_set()
1567 		if (mem_mask != 0) {  in ddr3_tip_freq_set()
2434 	u32 if_id = 0, mem_mask = 0, bus_index = 0;  in ddr3_tip_enable_init_sequence()  local
2455 		mem_mask = 0;  in ddr3_tip_enable_init_sequence()
2459 			mem_mask |=  in ddr3_tip_enable_init_sequence()
2464 		if (mem_mask != 0) {  in ddr3_tip_enable_init_sequence()